The present disclosure describes a semiconductor device that includes nanostructures on a substrate and a source/drain region in contact with the nanostructures. The source/drain region includes (i) a first epitaxial structure embedded in the substrate; (ii) a nitride layer on the first epitaxial structure; and a second epitaxial structure on the first epitaxial structure. The semiconductor device also includes a gate structure formed on the nanostructures.

An imprinting platform including a noble metal catalyst, a semiconductor substrate, and a pre-patterned polymer stamp, where the catalyst is attached to the stamp, and related methods and articles.

In one exemplary aspect, a method comprises providing a semiconductor structure having a substrate, one or more first dielectric layers over the substrate, a first metal plug in the one or more first dielectric layers, and one or more second dielectric layers over the one or more first dielectric layers and the first metal plug. The method further comprises etching a via hole into the one or more second dielectric layers to expose the first metal plug, etching a top surface of the first metal plug to create a recess thereon, and applying a metal corrosion protectant comprising a metal corrosion inhibitor to the top surface of the first metal plug.

A metal structure includes a patterned molybdenum tantalum oxide layer and a patterned metal layer. The patterned molybdenum tantalum oxide layer is disposed on a first substrate, in which the patterned molybdenum tantalum oxide layer includes about 2 to 12 atomic percent of tantalum. Both of an atomic percent of molybdenum and an atomic percent of oxygen of the patterned molybdenum tantalum oxide layer are greater than the atomic percent of tantalum of the patterned molybdenum tantalum oxide layer. The patterned metal layer is disposed on the patterned molybdenum tantalum oxide layer.

A method of selectively etching a metal component of a workpiece further comprising a ferromagnetic insulator component. The method comprises contacting the metal component with an etchant solution. The etchant solution comprises a basic etchant and a solvent. The method is useful in the context of the fabrication of semiconductor-superconductor-ferromagnetic insulator hybrid devices, for example. The etchant solution may not attack the ferromagnetic insulator component. Also provided is a composition for etching a metal, and a kit comprising the composition and a composition for depositing a styrene-acrylate co-polymer on a surface.

The present application relates to a semiconductor device with an intervening layer and a method for fabricating the semiconductor device with the intervening layer. The semiconductor device includes a substrate, a bottom conductive plug positioned on the substrate, an intervening conductive layer positioned on the bottom conductive plug, and a top conductive plug positioned on the intervening conductive layer. A top surface of the intervening conductive layer is non-planar.

Semiconductor device and the manufacturing method thereof are disclosed. An exemplary method of manufacture comprises receiving a substrate including a semiconductor material stack formed thereon, wherein the semiconductor material stack includes a first semiconductor layer of a first semiconductor material and second semiconductor layer of a second semiconductor material that is different than the first semiconductor material. Patterning the semiconductor material stack to form a trench. The patterning includes performing a first etch process with a first etchant for a first duration and then performing a second etch process with a second etchant for a second duration, where the second etchant is different from the first etchant and the second duration is greater than the first duration. The first etch process and the second etch process are repeated a number of times. Then epitaxially growing a third semiconductor layer of the first semiconductor material on a sidewall of the trench.

This wet etching method comprises rotating a substrate (W), supplying an etching chemical to a first surface (a surface for forming a device) of the rotating substrate, and supplying an etching inhibitor (DIW) to a second surface (a surface which is not used for forming a device) during the supplying the etching chemical to the substrate. The etching inhibitor moves past an edge (WE) of the substrate to swirl onto the first surface and reaches a first region extending from the edge of the substrate on the periphery of the first surface to a first radial position located radially inward from the edge on the first surface. Thus, it is possible to perform an excellent bevel etching treatment on the upper layer of the substrate having a two-layered film formed thereon.

Generally, the present disclosure provides example embodiments relating to formation of a gate structure of a device, such as in a replacement gate process, and the device formed thereby. In an example method, a gate dielectric layer is formed over an active area on a substrate. A dummy layer that contains a passivating species (such as fluorine) is formed over the gate dielectric layer. A thermal process is performed to drive the passivating species from the dummy layer into the gate dielectric layer. The dummy layer is removed. A metal gate electrode is formed over the gate dielectric layer. The gate dielectric layer includes the passivating species before the metal gate electrode is formed.

An etching method for quickly removing a seed layer that is formed of titanium and/or a titanium alloy, while suppressing dissolution of other metals from copper wiring lines and the like, for continuous and stable processing; and a composition which is used for this etching method. The composition comprises, based on a total amount of the composition, 0.01 to 0.23% by mass hydrogen peroxide, 0.2 to 3% by mass fluoride, 0.0005 to 0.025% by mass of a halide ion other than a fluoride ion, and water. A method for using the composition to produce a substrate is also described.