A method for fabricating a metal oxide thin film transistor comprises selecting a substrate and fabricating a gate electrode thereon; growing a layer of dielectric or high permittivity dielectric on the substrate to serve as a gate dielectric layer; growing a first metal layer on the gate dielectric layer and a second metal layer on the first metal layer; fabricating a channel region at a middle position of the first metal layer and a passivation region at a middle position of the second metal layer; anodizing the metals of the passivation region and the channel region at atmospheric pressure and room temperature; fabricating a source and a drain; forming an active region comprising the source, the drain, and the channel region; depositing a silicon nitride layer on the active region; fabricating two electrode contact holes; depositing a metal aluminum film; and fabricating two metal contact electrodes by photolithography and etching.

A method for fabricating a metal oxide thin film transistor comprises selecting a substrate and fabricating a gate electrode thereon; growing a layer of dielectric or high permittivity dielectric on the substrate to serve as a gate dielectric layer; growing a first metal layer on the gate dielectric layer and a second metal layer on the first metal layer; fabricating a channel region at a middle position of the first metal layer and a passivation region at a middle position of the second metal layer; anodizing the metals of the passivation region and the channel region at atmospheric pressure and room temperature; fabricating a source and a drain; forming an active region comprising the source, the drain, and the channel region; depositing a silicon nitride layer on the active region; fabricating two electrode contact holes; depositing a metal aluminum film; and fabricating two metal contact electrodes by photolithography and etching.

A method for producing a closed cavity on a substrate, including: a) forming a cavity surrounded by at least one block on a given face of a substrate, the cavity having an aspect ratio higher than a determined threshold; and b) depositing a closing layer on the at least one block surrounding the cavity, the aspect ratio of the cavity being such that in b), the closing layer does not entirely fill the cavity and an empty space in the cavity is maintained.

The present disclosure provides a thin film transistor array substrate and a fabrication method thereof, and a display device. The thin film transistor array substrate includes an active layer. The active layer is formed using a zinc target under an environment of oxygen and nitrogen in a sputtering chamber. A source/drain buffer layer is formed on the active layer using the zinc target by a sputtering process in the sputtering chamber under an environment containing one of oxygen and nitrogen.

The present disclosure provides a thin film transistor array substrate and a fabrication method thereof, and a display device. The thin film transistor array substrate includes an active layer. The active layer is formed using a zinc target under an environment of oxygen and nitrogen in a sputtering chamber. A source/drain buffer layer is formed on the active layer using the zinc target by a sputtering process in the sputtering chamber under an environment containing one of oxygen and nitrogen.

A semiconductor device comprising: an oxide semiconductor layer including indium; a gate electrode facing to the oxide semiconductor layer; a gate insulating layer between the oxide semiconductor layer and the gate electrode; a first conductive layer arranged above the oxide semiconductor layer and being in contact with the oxide semiconductor layer from above the oxide semiconductor layer; an oxide portion formed on the oxide semiconductor layer and at an edge of the first conductive layer, the oxide portion being a oxide of the first conductive layer.

A semiconductor device comprising: an oxide semiconductor layer including indium; a gate electrode facing to the oxide semiconductor layer; a gate insulating layer between the oxide semiconductor layer and the gate electrode; a first conductive layer arranged above the oxide semiconductor layer and being in contact with the oxide semiconductor layer from above the oxide semiconductor layer; an oxide portion formed on the oxide semiconductor layer and at an edge of the first conductive layer, the oxide portion being a oxide of the first conductive layer.

Methods and apparatuses for reducing roughness using integrated atomic layer deposition (ALD) and etch processes are described herein. In some implementations, after a mask is provided on a substrate, methods include depositing a conformal layer on the mask by ALD to reduce roughness and etching a layer underlying the mask to form patterned features having a reduced roughness. In some implementations, after a substrate is etched to a first depth to form features at the first depth in the substrate, methods include depositing a conformal layer by ALD on sidewalls of the features to protect sidewalls and reduce roughness during a subsequent etch process. The ALD and etch processes may be performed in a plasma chamber.

Methods and apparatuses for reducing roughness using integrated atomic layer deposition (ALD) and etch processes are described herein. In some implementations, after a mask is provided on a substrate, methods include depositing a conformal layer on the mask by ALD to reduce roughness and etching a layer underlying the mask to form patterned features having a reduced roughness. In some implementations, after a substrate is etched to a first depth to form features at the first depth in the substrate, methods include depositing a conformal layer by ALD on sidewalls of the features to protect sidewalls and reduce roughness during a subsequent etch process. The ALD and etch processes may be performed in a plasma chamber.

A change in electrical characteristics in a semiconductor device including an oxide semiconductor film is inhibited, and the reliability is improved. The semiconductor device includes a gate electrode, a first insulating film over the gate electrode, an oxide semiconductor film over the first insulating film, a source electrode electrically connected to the oxide semiconductor film, a drain electrode electrically connected to the oxide semiconductor film, a second insulating film over the oxide semiconductor film, the source electrode, and the drain electrode, a first metal oxide film over the second insulating film, and a second metal oxide film over the first metal oxide film. The first metal oxide film contains at least one metal element that is the same as a metal element contained in the oxide semiconductor film. The second metal oxide film includes a region where the second metal oxide film and the first metal oxide film are mixed.