A semiconductor package comprises a lead frame, a chip, and a molding encapsulation. The lead frame comprises one or more die paddles, a first plurality of leads, and a second plurality of leads. A respective end surface of each lead of the first plurality of leads and the second plurality of leads is plated with a metal. A first respective window on a first side of each lead of the first plurality of leads and the second plurality of leads is not plated with the metal. A second respective window on a second side of each lead of the first plurality of leads and the second plurality of leads is not plated with the metal. A method for fabricating a semiconductor package comprises the steps of providing a lead frame array, mounting a chip, forming a molding encapsulation, and applying a cutting process or a punching process.

Semiconductor devices are arranged in a chain extending in a longitudinal direction have mutually facing end sides transverse the longitudinal direction and are coupled via tie bars located at the mutually facing end sides. The tie bars are provided with anchoring tips penetrating into an insulating package at mutually facing end sides of the devices. The tie bars can be deformed to extract the anchoring tips from the insulating package at the mutually facing end sides of the devices. Individual singulated devices are thus produced in response to the anchoring tips being extracted from the mutually facing end sides of the devices.

A method of making a packaged integrated circuit device includes forming a lead frame with leads that have an inner portion and an outer portion, the inner portion of the lead is between a periphery of a die pad and extends to one end of openings around the die pad. The outer portion of the leads are separated along their length almost up to an opposite end of the openings. Leads in a first subset of the leads alternate with leads in a second subset of the leads. The inner portion of the first subset of the leads is bent. The die pad, the inner portion of the leads, and only a first portion of the openings adjacent the inner portion of the leads are encapsulated. A second portion of the openings and the output portions of the leads form a dam bar for the encapsulating material.

An electronic component includes one or more circuits having electrical connections coupled therewith. The electrical connections include a lead frame as well as electrical wires coupling the circuit or circuits to respective portions of the lead frame. The electrical wires may be formed as one piece with the respective portion of the lead frame without joints therebetween, e.g., by 3D printing.

A semiconductor device includes a metal member, a first semiconductor chip, a second semiconductor chip, a first solder and a second solder. A quantity of heat generated in the first semiconductor chip is greater than the second semiconductor chip. The second semiconductor chip is formed of a material having larger Young's modulus than the first semiconductor chip. The first semiconductor chip has a first metal layer connected to the metal member through a first solder at a surface facing the metal member. The second semiconductor chip has a second metal layer connected to the metal member through a second solder at a surface facing the metal member. A thickness of the second solder is greater than a maximum thickness of the first solder at least at a portion of the second solder corresponding to a part of an outer peripheral edge of the second metal layer.

A semiconductor device includes a sealing resin being an insulating resin sealing the semiconductor element therein, and a plurality of electrode terminals each including a root portion being a root protruding from the sealing resin, a tip portion being a tip and portion extending from the root portion, and a middle portion provided between the tip portion and the root portion, and the middle portion includes first middle portions having a width wider than those of the root portion and the tip portion in the first direction, and a second middle portion having a width wider than those of the root portion and the tip portion in the first direction, a width narrower than those of the first middle portions in the first direction, and a bent portion bent toward in a third direction orthogonal to the first direction and the second direction.

A semiconductor device is provided, including a leadframe, a die attached to the leadframe using a first solder, a source clip and a gate clip attached to the die using a second solder, and a drain clip attached to the leadframe. The semiconductor device is inverted, so that the source clip and the gate clip are positioned on the bottom side of the semiconductor device, and the leadframe is positioned on the top side of the semiconductor device so that the leadframe is a top exposed drain clip. The source clip and/or the drain clip comprise a half cut locking feature. The half cut locking feature can be formed as a wing and located at the sides of the source clip and the gate clip.

An electronic device, a lead frame, and a method, including providing a lead frame with a Y-shaped feature having branch portions connected to a dam bar in a prospective gap in an equally spaced repeating lead pitch pattern, and a set of first leads extending parallel to one another along a first direction and spaced apart from one another along a second direction in lead locations of the repeating lead pitch pattern, attaching a semiconductor die to a die attach pad of the lead frame, attaching bond wires between bond pads of the semiconductor die, and the first leads, enclosing first portions of the first leads, the die attach pad, and a portion of the semiconductor die in a package structure, and performing a dam bar cut process that cuts through portions of the dam bar between the lead locations of the repeating lead pitch pattern.

A leadframe includes leads or lead terminals, a plurality of folded features including i) support features positioned within an area defined in at least one dimension by the leads or the lead terminals configured for supporting at least one of a die pad and a first pad and a second pad spaced apart from one another, or ii) current carrying features. At least one of the folded features includes a planar portion and a folded edge structure that curves upwards at an angle of at least 45° relative to the planar portion. The folded features are configured to provide an effective increase in thickness to reduce the deformation observed in assembly.

A method of forming a leadless packaged semiconductor device. First partial sawing leads is performed on a bottom side of an in-process leadless semiconductor package having a leadframe including die pad with a semiconductor chip thereon, and leads defining top and bottom surfaces and having an inner end and an outer end having a bottom corner region. Conductive bond wires connect to and extending between bond pads on the chip and respective leads, a mold compound is around the die pad, leads, chip, and conductive bond wires while exposing the bottom surface and outer end. The first sawing completely severs the leads while forming only a partial cut in the mold compound. A de-flash process is applied to the bottom side. The second sawing aligned to the partial cuts reaches the partial cuts to complete singulation of the package, wherein the second sawing does not touch the leads.