Patent classifications
H01L2224/13255
HYBRID BONDING STRUCTURES, SEMICONDUCTOR DEVICES HAVING THE SAME, AND METHODS OF MANUFACTURING THE SEMICONDUCTOR DEVICES
Provided are a hybrid bonding structure, a solder paste composition, a semiconductor device, and a method of manufacturing the semiconductor device. The hybrid bonding structure includes a solder ball and a solder paste bonded to the solder ball. The solder paste includes a transient liquid phase. The transient liquid phase includes a core and a shell on a surface of the core. A melting point of the shell may be lower than a melting point of the core. The core and the shell are configured to form an intermetallic compound in response to the transient liquid phase at least partially being at a temperature that is within a temperature range of about 20° C. to about 190° C.
METHOD OF FABRICATING SEMICONDUCTOR PACKAGE
Provided is a method of fabricating a semiconductor package. The method of fabricating the semiconductor package include preparing a lower element including a lower substrate, a lower electrode, an UBM layer, and a reducing agent layer, providing an upper element including an upper substrate, an upper electrode, and a solder bump layer, providing a pressing member on the upper substrate to press the upper substrate to the lower substrate, and providing a laser beam passing through the pressing member to bond the upper element to the lower element.
Lead free solder columns and methods for making same
Disclosed herein are embodiments of lead-free (Pb-free) or lead-bearing solder column devices that can include an inner core, an outer sleeve surrounding a portion of the inner core, at least one space along a length of the outer sleeve, and a second layer including a solder material coupled with a portion of the inner core within the at least one space. The inner core can be configured to support the solder column so as to prevent a collapse of the solder column at temperatures above a liquidus temperature of the outer sleeve's solder material and the second layer's solder material. The column serves as a heat-sink to conduct excessive heat away from a heat generating semiconductor chip. Moreover, the compliant solder column absorbs strain and mechanical stress caused by a difference in the coefficient of thermal expansion (CTE) connecting the semiconductor chip to a printed circuit board (PCB).
Semiconductor package with intermetallic-compound solder-joint comprising solder, UBM, and reducing layer materials
Provided is a method of fabricating a semiconductor package. The method of fabricating the semiconductor package include preparing a lower element including a lower substrate, a lower electrode, an UBM layer, and a reducing agent layer, providing an upper element including an upper substrate, an upper electrode, and a solder bump layer, providing a pressing member on the upper substrate to press the upper substrate to the lower substrate, and providing a laser beam passing through the pressing member to bond the upper element to the lower element.
CHIP PACKAGE AND METHOD FOR FORMING THE SAME
A chip package including a substrate is provided. A sensing region or device region of the substrate is electrically connected to a conducting pad. A first insulating layer is disposed on the substrate. A redistribution layer is disposed on the first insulating layer. A first portion and a second portion of the redistribution layer are electrically connected to the conducting pad. A second insulating layer conformally extends on the first insulating layer, and covers side surfaces of the first portion and the second portion. A protection layer is disposed on the second insulating layer. A portion of the second insulating layer is located between the protection layer and the first insulating layer. A method of forming the chip package is also provided.
CHIP PACKAGE AND METHOD FOR FORMING THE SAME
A chip package including a substrate is provided. A sensing region or device region of the substrate is electrically connected to a conducting pad. A first insulating layer is disposed on the substrate. A redistribution layer is disposed on the first insulating layer. A first portion and a second portion of the redistribution layer are electrically connected to the conducting pad. A second insulating layer conformally extends on the first insulating layer, and covers side surfaces of the first portion and the second portion. A protection layer is disposed on the second insulating layer. A portion of the second insulating layer is located between the protection layer and the first insulating layer. A method of forming the chip package is also provided.
Hybrid bonding structures, semiconductor devices having the same, and methods of manufacturing the semiconductor devices
Provided are a hybrid bonding structure, a solder paste composition, a semiconductor device, and a method of manufacturing the semiconductor device. The hybrid bonding structure includes a solder ball and a solder paste bonded to the solder ball. The solder paste includes a transient liquid phase. The transient liquid phase includes a core and a shell on a surface of the core. A melting point of the shell may be lower than a melting point of the core. The core and the shell are configured to form an intermetallic compound in response to the transient liquid phase at least partially being at a temperature that is within a temperature range of about 20 C. to about 190 C.