A memory device includes an array of memory cells configured on a die or chip and coupled to sense lines and access lines of the die or chip and a respective sense amplifier configured on the die or chip coupled to each of the sense lines. Each of a plurality of subsets of the sense lines is coupled to a respective local input/output (I/O) line on the die or chip for communication of data on the die or chip and a respective transceiver associated with the respective local I/O line, the respective transceiver configured to enable communication of the data to one or more device off the die or chip.

The disclosure provides an electronic device and a manufacturing method thereof. The electronic device includes a substrate, an electronic element, an underfill layer, and a protective structure. The electronic element is disposed on the substrate. At least a portion of the underfill layer is disposed between the substrate and the electronic element. A thickness of the underfill layer is not greater than a height from a surface of the substrate to an upper surface of the electronic element. The protective structure is disposed on the substrate and adjacent to the underfill layer. The electronic device and the manufacturing method thereof of the disclosure may effectively control an area of the underfill layer.

The present invention discloses a display panel and a head mounted device. The display panel includes a substrate and a plurality of micro light emitting units. A first position and a second position are defined at an edge and a center of the substrate respectively. The micro light emitting units are arranged and disposed on the substrate. Any two of the micro light emitting units are disposed at the first position and the second position respectively. Wherein each micro light emitting unit defines a luminating top surface, and a reference angle is defined between each luminating top surface and a reference plane respectively. Wherein the reference angle defined between each luminating top surface and the reference plane gradually decreases from the first position to the second position, and the luminating top surface of the micro light emitting unit located at the second position is parallel to the reference surface.

An integrated circuit package includes a first integrated circuit die, a spacer die coupled in the integrated circuit package in a location designed to house a second integrated circuit die, and a package substrate coupled to the first integrated circuit die and to the spacer die.

A dipping apparatus includes a squeegee device and a plate for forming a flux film out of flux. A surface of the plate has a rough surface with a nano-level arithmetically average roughness. The dipping apparatus is configured in such a way that the squeegee device and the plate are moved relatively to each other, and the flux is fed from the squeegee device to the rough surface of the plate.

This mounting apparatus is provided with: a plurality of bonding stations each comprising a bonding apparatus for bonding a semiconductor chip onto a substrate wafer, and a chip supply apparatus for supplying the semiconductor chip to the bonding apparatus; and a single wafer transfer apparatus which transfers the substrate wafer in order to supply the substrate wafer to each of the plurality of bonding stations and to collect the substrate wafer from each of the plurality of bonding stations.

A composite wiring board includes a first wiring board including a first insulating layer, a first conductor layer formed on the first insulating layer, and metal elements penetrating the first insulating layer and the first conductor layer such that the metal elements are electrically connected to each other by the first conductor layer, and a second wiring board including a second insulating layer and a second conductor layer forming on the second insulating layer and including metal connection terminals such that the metal connection terminals are corresponding to and directly bonded to the metal elements of the first wiring board, respectively.

A bonding apparatus comprises a chip holding part that disposes a chip part onto a substrate that has been placed on a substrate stage. The bonding apparatus adjusts the inclination of a chip holding surface that releasably holds the chip part. The bonding apparatus comprises: an adjustment controller which stores inclination information pertaining to inclination respectively for locations on a stage main surface having the substrate placed thereon; and a conforming jig which has a conforming surface onto which the chip holding surface is pressed, and in which the inclination of the conforming surface can be changed such that the inclination of the chip holding surface corresponds to the inclination indicated by the inclination information.

This patent application relates to methods and apparatus for temperature modification within a stack of microelectronic devices for mutual collective bonding of the microelectronic devices, and to related substrates and assemblies.

A chip package structure is provided. The chip package structure includes a redistribution structure and a first chip structure over the redistribution structure. The chip package structure also includes a first solder bump between the redistribution structure and the first chip structure and a first molding layer surrounding the first chip structure. The chip package structure further includes a second chip structure over the first chip structure and a second molding layer surrounding the second chip structure. In addition, the chip package structure includes a third molding layer surrounding the first molding layer, the second molding layer, and the first solder bump. A portion of the third molding layer is between the first molding layer and the redistribution structure.