A light-receiving device includes: a first chip having a pixel region in which a sensor pixel is provided; a second chip including a processing circuit that performs signal processing on a sensor signal outputted from the sensor pixel, the second chip being stacked on the first chip; and a first alignment mark provided in the pixel region of the first chip to correspond to a second alignment mark provided in the second chip.

A light receiving element according to the present disclosure includes a sensor substrate (102) and a circuit board (101). The sensor substrate (102) is provided with a light receiving region (103), a pair of voltage application electrodes, and an incident surface electrode (104). The light receiving region (103) photoelectrically converts incident light into signal charges. A voltage is alternately applied to the pair of voltage application electrodes to generate, in the light receiving region (103), an electric field that time-divides the signal charges and distributes the signal charges to a pair of charge accumulation electrodes. The incident surface electrode (104) is provided on an incident surface of light in the light receiving region (103), and a voltage equal to or lower than a ground potential is applied to the incident surface electrode. The circuit board (101) is provided on a surface facing the incident surface of the light, of the sensor substrate (102). The circuit board (101) is provided with a pixel transistor that processes the signal charges accumulated in the charge accumulation electrodes.

An imaging device capable of reducing a useless region on a substrate is provided. An imaging device including a plurality of substrates to be stacked includes a readout-only circuit disposed on a substrate different from a substrate having a pixel array unit including a plurality of photoelectric conversion elements disposed thereon, and performing an operation of reading out electrical signals obtained through photoelectric conversion in the plurality of photoelectric conversion elements, and a circuit disposed on a substrate different from the substrate having the readout-only circuit disposed thereon and performing an operation other than an operation of the readout-only circuit on the basis of the electrical signals.

A solid-state imaging device according to the present disclosure includes a light-receiving substrate, a circuit board, and a plurality of first connections. The light-receiving substrate includes a plurality of light-receiving circuits provided with photoelectric conversion elements. The circuit board is directly bonded to the light-receiving substrate and includes a plurality of address event detection circuits that detects individual changes in voltages output from the photoelectric conversion elements of the plurality of light-receiving circuits. The plurality of first connections is provided at a joint between the light-receiving substrate and the circuit board to electrically connect the light-receiving circuits and the address event detection circuits corresponding to each other.

A semiconductor device is provided. The device comprises first semiconductor wafer comprising first BEOL structure disposed on first side of first substrate, the first BEOL structure comprising first metallization layer disposed over the first substrate, second metallization layer disposed over the first metallization layer, first storage device disposed between the first and second metallization layers, and first transistor contacting the first storage device, and a first bonding layer disposed over the first BEOL structure. The device also comprises second semiconductor wafer comprising second BEOL structure disposed on first side of second substrate, the second BEOL structure comprising third metallization layer disposed over the second substrate, fourth metallization layer disposed over the third metallization layer, second storage device disposed between the third and fourth metallization layers, and second transistor contacting the second storage device, and second bonding layer disposed over the second BEOL structure and contacting the first bonding layer.

A first circuit structure of an electronic IC device includes comprises light-sensitive optical circuit components. A second circuit structure of the electronic IC device includes an electronic circuit component and an electrically-conductive layer extending between and at a distance from the optical circuit components and the electronic circuit component. Electrical connections link the optical circuit components and the electronic circuit component. These electrical connections are formed in holes which pass through dielectric layers and the intermediate conductive layer. Electrical insulation rings between the electrical connections and the conductive layer are provided which surround the electrical connections and have a thickness equal to a thickness of the conductive layer.

Photo-emitting and/or photo-receiving diode array device, comprising: a stack of first and second semiconductor layers doped according to different types; first trenches passing through the stack and surrounding a region of the stack wherein several diodes are formed; dielectric portions arranged in the first trenches and covering lateral flanks of said region over the entire thickness of the second layer and a first part of the thickness of the first layer; first electrically conductive portions arranged in the first trenches and covering the lateral flanks of said region over a second part of the thickness of the first layer, and forming first electrodes of the diodes of said region; at least one second trench partially passing through the first layer and separating the portions of the first layer from the diodes of said region.

A semiconductor package may include an image sensor chip, a transparent substrate spaced apart from the image sensor chip, a joining structure in contact with a top surface of the image sensor chip and a bottom surface of the transparent substrate, on an edge region of the top surface of the image sensor chip, and a circuit substrate electrically connected to the image sensor chip. The image sensor chip may include a penetration electrode which penetrates at least a portion of an internal portion of the image sensor chip, and a terminal pad, which is on the edge region of the top surface of the image sensor chip and is connected to the penetration electrode. The joining structure may include a spacer and an adhesive layer which is between and attached to the spacer and the image sensor chip. The joining structure may the terminal pad.

A focal-plane array includes an array of pixels. Each pixel includes an avalanche-type diode on a first layer, a read-out circuit (ROIC) on a second layer, and a power-supply circuit on a middle layer stacked between the first layer and the second layer. Since each pixel includes the avalanche-type diode, the ROIC, and the power-supply circuit on different layers circuitry for each pixel is in a top-down footprint of the pixel. Thus a consistent bias voltage to each pixel, decouples the avalanche-type diodes of the different pixels to eliminate crosstalk between adjacent pixels, and allows for individual control of each pixel.

Disclosed herein is a method comprising: forming a first electrically conductive layer on a first surface of a substrate of semiconductor, wherein the first electrically conductive layer is in electrical contact with the semiconductor; bonding, at the first electrically conductive layer, a support wafer to the substrate of semiconductor; thinning the substrate of semiconductor.