To improve image quality of image data in a solid-state image sensor that detects an address event. The solid-state image sensor includes a photodiode, a pixel signal generation unit, and a detection unit. In the solid-state image sensor, the photodiode generates electrons and holes by photoelectric conversion. The pixel signal generation unit generates a pixel signal having a voltage according to an amount of one of the electrons and the holes. The detection unit detects whether or not a change amount in the other of the electrons and the holes has exceeded a predetermined threshold and outputs a detection signal.

There is provided a solid-state imaging device that includes a photoelectric conversion unit, a transfer gate, a floating diffusion unit, and a transistor. The photoelectric conversion unit produces a charge according to incident light. The transfer gate has a columnar shape having an opening that is continuous in a vertical direction, and transfers the charge from the photoelectric conversion unit. The floating diffusion unit is formed extending to a region surrounded by the opening of the transfer gate, and converts the transferred charge into a voltage signal. The transistor is electrically connected to the floating diffusion unit via a diffusion layer.

An image sensor may include: a pixel array including a plurality of pixels; and a timing controller configured to control the pixel array according to an operation mode of the pixel array. The operation mode may be any one of a first mode in which the plurality of pixels operate according to a global shutter method and a second mode in which the plurality of pixels operate according to a dual conversion gain method.

An imaging device 100 includes a pixel array PA. A first period, a third period, and a second period appear in this order in one frame. During the first period, pixel signal readout is performed on at least one first row in the pixel array PA. During the second period, pixel signal readout is performed on at least one second row in the pixel array PA. At least one of the at least one first row or the at least one second row includes two rows in the pixel array PA. During the third period, no pixel signal readout is performed on the rows in the pixel array PA. Each of the first period and the second period is one of the high-sensitivity exposure period and the low-sensitivity exposure period. The third period is the other of the high-sensitivity exposure period and the low-sensitivity exposure period.

A charge-coupled device includes an array of insulated electrodes vertically penetrating into a semiconductor substrate. The array includes rows of alternated longitudinal and transverse electrodes. Each end of a longitudinal electrode of a row is opposite and separated from a portion of an adjacent transverse electrode of that row. Electric insulation walls extend parallel to one another and to the longitudinal electrodes. The insulation walls penetrate vertically into the substrate deeper than the longitudinal electrodes. At least two adjacent rows of electrodes are arranged between each two successive insulation walls.

An imaging device includes a plurality of photodiodes arranged in a photodiode array to generate charge in response to incident light. The plurality of photodiodes includes first and second photodiodes. A shared floating diffusion receives charge transferred from the first and second photodiodes. An analog to digital converter (ADC) performs a first ADC conversion to generate a reference readout in response to charge in the shared floating diffusion after a reset operation. The ADC is next performs a second ADC conversion to generate a first half of a phase detection autofocus (PDAF) readout in response to charge transferred from the first photodiode to the shared floating diffusion. The ADC then performs a third ADC conversion to generate a full image readout in response to charge transferred from the second photodiode combined with the charge transferred previously from the first photodiode in the shared floating diffusion.

A solid-state imaging device includes a plurality of pixel cells, each of the pixel cells including a light receiving element, a floating diffusion, a first source follower circuit, and a second source follower circuit. The plurality of pixel cells are connected to an output signal line. The light receiving element photoelectrically converts incident light, and stores a signal charge. The floating diffusion converts the signal charge read out of the light receiving element into a signal voltage. The first source follower circuit is connected to the floating diffusion, and outputs an output voltage corresponding to the signal voltage. The second source follower circuit is connected in series with the first source follower circuit, and outputs a pixel signal corresponding to the output voltage.

There is provided a pixel circuit including a first circuit and a second circuit. The first circuit is used to output a first voltage associated with exposure intensity. The second circuit is used to output a second voltage associated with exposure time interval. The processor multiples the first voltage to a ratio between a reference voltage and the second voltage to obtain an actual light intensity, wherein the reference voltage is a voltage value outputted by the second circuit of a dummy pixel.

Provided is a solid-state image pickup element that amplifies the difference between respective signals of a pair of pixels and enables a reduction in the number of wiring lines. The solid-state image pickup element includes an electric-charge accumulation unit, a reference reset transistor, and a readout reset transistor. The electric-charge accumulation unit accumulates electric charge transferred from a photoelectric conversion unit and generates signal voltage corresponding to the amount of the electric charge. The reference reset transistor supplies predetermined reset voltage to the electric-charge accumulation unit in a case of generating predetermined reference voltage. The readout reset transistor supplies voltage different from the reset voltage to the electric-charge accumulation unit in a case of reading out the signal voltage.

An image sensor including first and second pixel groups, each of which includes first to ninth pixels arranged to form a 3×3 array is disclosed. The image sensor further includes first to ninth transfer transistors disposed in each of the pixel groups to correspond to the first to ninth pixels, respectively, each of the first to ninth transfer transistors including a transfer gate and a floating diffusion region, a selection transistor disposed in at least one of the fourth to sixth pixels in each of the pixel group, and source follower transistors respectively disposed in at least two pixels of the first to third and seventh to ninth pixels in each of the pixel groups. Source follower gates of the source follower transistors may be connected to the floating diffusion region of each of the first to ninth transfer transistors.