Patent classifications
H01L31/108
ULTRAVIOLET LIGHT RECEIVING DEVICE
Provided is an ultraviolet light receiving device having photosensitivity effective to target wavelengths in the ultraviolet region. A Schottky junction ultraviolet light receiving device has the photosensitivity peak wavelength in an ultraviolet region of 230 nm or more and 320 nm or less, and exhibits a rejection ratio of 10.sup.5 or more, the rejection ratio being the ratio of the responsivity Rp to the peak photosensitivity wavelength to the average of the responsivity Rv to a visible region of 400 nm or more and 680 nm or less (Rp/Rv).
ULTRAVIOLET LIGHT RECEIVING DEVICE
Provided is an ultraviolet light receiving device having photosensitivity effective to target wavelengths in the ultraviolet region. A Schottky junction ultraviolet light receiving device has the photosensitivity peak wavelength in an ultraviolet region of 230 nm or more and 320 nm or less, and exhibits a rejection ratio of 10.sup.5 or more, the rejection ratio being the ratio of the responsivity Rp to the peak photosensitivity wavelength to the average of the responsivity Rv to a visible region of 400 nm or more and 680 nm or less (Rp/Rv).
Silicon carbide-based full-spectrum-responsive photodetector and method for producing same
The present application relates to semiconductor photodetectors, in particular to a silicon carbide-based UV-visible-NIR full-spectrum-responsive photodetector and a method for fabricating the same. The photodetector includes a silicon carbide substrate, and metal counter electrodes and a surface plasmon polariton nanostructure arranged thereon. The silicon carbide substrate and the metal counter electrodes constitute a metal-semiconductor-metal photodetector with coplanar electrodes. When the ultraviolet light is input, free carriers directly generated in silicon carbide are collected by an external circuit to generate electrical signals. When the visible light is input, hot carriers generated in the surface plasmon polariton nanostructure tunnel into the silicon carbide semiconductor to become free carriers to generate electrical signals.
CMOS COMPATIBLE NEAR-INFRARED SENSOR SYSTEM
A surface plasmon-based photodetector includes: a silicon substrate; a grating in contact with a surface of the silicon substrate, in which the grating forms a Schottky diode with the semiconductor substrate; and a complementary-metal-oxide-semiconductor (CMOS) sample and hold stage as well as an analog-to-digital circuit (ADC) in the silicon substrate and arranged to detect electrical current generated at the Schottky diode.
CMOS COMPATIBLE NEAR-INFRARED SENSOR SYSTEM
A surface plasmon-based photodetector includes: a silicon substrate; a grating in contact with a surface of the silicon substrate, in which the grating forms a Schottky diode with the semiconductor substrate; and a complementary-metal-oxide-semiconductor (CMOS) sample and hold stage as well as an analog-to-digital circuit (ADC) in the silicon substrate and arranged to detect electrical current generated at the Schottky diode.
PHOTOVOLTAIC JUNCTIONS AND METHODS OF PRODUCTION
The present disclosure is directed to methods for producing a photovoltaic junction that can include coating a bare junction with a composition. In one embodiment, the composition includes a plurality of quantum dots to create a film; exposing the film to a ligand to create a first layer; coating the first layer with the composition to form a film on the first layer; and exposing the film on the first layer to the ligand to create a second layer.
PHOTOVOLTAIC JUNCTIONS AND METHODS OF PRODUCTION
The present disclosure is directed to methods for producing a photovoltaic junction that can include coating a bare junction with a composition. In one embodiment, the composition includes a plurality of quantum dots to create a film; exposing the film to a ligand to create a first layer; coating the first layer with the composition to form a film on the first layer; and exposing the film on the first layer to the ligand to create a second layer.
Semiconductor Device
A semiconductor device includes a semiconductor layer, which is disposed on the surface of a substrate and causing an oxidation reaction and a reduction reaction when irradiated with light, an oxidation catalyst layer, which is disposed on part of the surface of the semiconductor layer, forms along with the semiconductor layer a Schottky junction, and oxidizes an oxidation target substance, a reduction catalyst layer, which is disposed on part of the surface of the semiconductor layer where the oxidation catalyst layer is not disposed so as to be separated from the oxidation catalyst layer, forms along with the semiconductor layer an ohmic junction, and reduces a reduction target substance, and an insulation layer, which is disposed on the entirety of the surface of the semiconductor layer where none of the oxidation catalyst layer and the reduction catalyst layer is disposed so as to be in contact with the oxidation catalyst layer and the reduction catalyst layer.
Semiconductor Device
A semiconductor device includes a semiconductor layer, which is disposed on the surface of a substrate and causing an oxidation reaction and a reduction reaction when irradiated with light, an oxidation catalyst layer, which is disposed on part of the surface of the semiconductor layer, forms along with the semiconductor layer a Schottky junction, and oxidizes an oxidation target substance, a reduction catalyst layer, which is disposed on part of the surface of the semiconductor layer where the oxidation catalyst layer is not disposed so as to be separated from the oxidation catalyst layer, forms along with the semiconductor layer an ohmic junction, and reduces a reduction target substance, and an insulation layer, which is disposed on the entirety of the surface of the semiconductor layer where none of the oxidation catalyst layer and the reduction catalyst layer is disposed so as to be in contact with the oxidation catalyst layer and the reduction catalyst layer.
Electro-optic nanoscale probes
An antenna electrode including a first electrode that includes a core and a first conductive surface; a second electrode that includes a second conductive surface; and an electrical tunnel junction between the first conductive surface and the second conductive surface, the tunnel junction having a gap width greater than about 0.1 nm and less than about 10 nm.