The present disclosure relates to a phase-locked loop (PLL) based on a charge-sharing locking technique, capable of both fractional-N and integer-N operation. The PLL comprises a voltage pre-setting stage; an oscillator: a shared capacitive load; and a switching network configured for selectively connecting the voltage pre-setting stage to the shared capacitive load during a voltage pre-setting stage for applying an expectant voltage to the capacitive load. The switching network is being further configured for selectively connecting the capacitive load to the oscillator during a charge-sharing locking stage for correcting a phase error in response to a difference between the expected voltage of the capacitor and the voltage of the oscillator. Frequency-tracking and waveform-learning stages are also provided for maintaining PVT (process, voltage, temperature) robustness and for suppressing fractional-N spur, respectively.

Apparatus and methods for generating multiple oscillating signals. An example circuit generally includes a first voltage-controlled oscillator (VCO) circuit and a second VCO circuit having a differential bias input coupled to a differential output of the first VCO circuit. At least one of the first VCO circuit or the second VCO circuit generally includes: a pair of cross-coupled transistors comprising a first transistor and a second transistor, a first inductive element coupled between a first node and the drain of the first transistor, a second inductive element coupled between the first node and the drain of the second transistor, a third transistor having a drain coupled to the drain of the first transistor and having a source coupled to a second node, and a fourth transistor having a drain coupled to the drain of the second transistor and having a source coupled to the second node.

The smart window for the smart home and smart grid can harvest energy and supply power to the home, grid and window itself. The smart window for the smart home and smart grid has all the Electrochromic panel, Solar panel and Multimedia panel been the same full window wide view and aligned with each other in IGU. To be a home automation system, the smart window has local/remote access/control capabilities. There are several types of smart windows working as master device or slave device. The operation of smart window automation system has three modes, normal/open mode, shut/tint mode and smart phone mode. The tube of air circulation system is hidden inside the frame surrounding IGU. Most of the electronic components are integrated to be FPSOC Field Programmable System On Chip that all the electronic component is hidden in the frame surrounding IGU, too. Therefore, the smart window doesn't have any blockage of window view with the Solar panel, Electrochromic panel, Multimedia panel and air circulation system. The smart window has the clean outlook as the conventional dual panel IGU does. The master device of the smart window system is similar to the huge screen working as a smart phone. In normal/open mode, the smart window is similar to the conventional dual panel window having the full-panel clean and clear view. For the different architectures of the smart homes, the smart window must have versatile alignments and system control that the smart window has to be implemented with the Field Programmable System On Chips of Anlinx, Milinx and Zilinx made of the W5RS advanced FPSOC chip technologies.

A voltage controlled oscillator includes a series resonant circuit having a resonance frequency and an active voltage driving device coupled to the series resonant circuit. The active voltage driving device provides a driving voltage and has an output negative resistance in an operative voltage range at the resonance frequency. The active voltage driving device includes a cross-coupled differential pair having voltage supply terminals providing the driving voltage. The series resonant circuit is coupled between the voltage supply terminals of the cross-coupled differential pair.

A semiconductor device according to the present embodiment includes a plurality of switching elements and a plurality of variable capacitance elements. The switching elements are switching elements connected in series between a first control terminal and a second control terminal and plural types of capacitance control signals can be supplied to the first control terminal and the second control terminal. The variable capacitance elements have capacitance control terminals connected to corresponding one ends of the switching elements, respectively.

An accurate replica oscillator-based frequency tracking loop (FTL) is provided. The replica oscillator used in the FTL can be at a lower frequency and therefore can consume much lower power compared to a main oscillator, such as an injection locked oscillator (ILO). The proposed FTL accurately sets the free running frequency of an ILO across process, voltage and temperature (PVT). Techniques are also provided to compensate the gain and offset error between the replica oscillator and the ILO.

According to one or more embodiments, a semiconductor integrated circuit device includes a first inductor portion, a second inductor portion, and a third inductor portion. The first inductor portion is in a first region of a first wiring layer. The second inductor portion is disposed in a second region of the first wiring layer. The third inductor portion is on a second wiring layer spaced from the first wiring layer in a first direction. The third inductor portion includes a first end portion electrically connected to a first end of the first inductor portion, a second end portion electrically connected to a first end of the second inductor portion, and a third end portion between the first and second end portions. The first inductor portion, the second inductor portion, and the third inductor portion constitute an inductor element.

Embodiments disclosed herein relate to oscillators including methods of operating the same, for example for use in radio frequency circuits. In an embodiment, an oscillator has cross-coupled transistors connected between a resonant circuit and a tail circuit. The resonant circuit and tail circuit have respective supply connections for powering the oscillator with an external power supply and the cross-coupled transistors have a bias circuit coupled to respective gates of the cross-coupled transistors and arranged to bias said transistors in an active region of operation. The tail circuit has a current source, a tail capacitor and a tail resistor coupled between a common node of the cross-coupled transistors and the supply connection of the tail circuit.

The invention relates to a resonator circuit, the resonator circuit comprising a transformer comprising a primary winding and a secondary winding, wherein the primary winding is inductively coupled with the secondary winding, a primary capacitor being connected to the primary winding, the primary capacitor and the primary winding forming a primary circuit, and a secondary capacitor being connected to the secondary winding, the secondary capacitor and the secondary winding forming a secondary circuit, wherein the resonator circuit has a common mode resonance frequency at an excitation of the primary circuit in a common mode, wherein the resonator circuit has a differential mode resonance frequency at an excitation of the primary circuit in a differential mode, and wherein the common mode resonance frequency is different from the differential mode resonance frequency.

An apparatus comprises a digitally controlled circuit having a variable capacitance and a controller configured to adjust a magnitude of the variable capacitance of the digitally controlled circuit. The digitally controlled circuit comprises a plurality of gain elements, the plurality of gain elements comprising one or more positive voltage-to-frequency gain elements and one or more negative voltage-to-frequency gain elements. The controller is configured to adjust the magnitude of the capacitance by adjusting the gain provided by respective ones of the gain elements in an alternating sequence of the positive voltage-to-frequency gain elements and the negative voltage-to-frequency gain elements.