A technique capable of detecting a substrate bias voltage at a low power consumption is provided. The technique including: a voltage boost circuit outputting a boost voltage based on a first clock signal having a first frequency; a voltage drop circuit outputting a drop voltage based on a second clock signal having a second frequency; and a logic circuit block comparing the first frequency and the second frequency and outputting a comparison result between the first frequency and the second frequency in accordance with predetermined criteria is provided.

A circuit for an oscillator with common-mode resonance includes a first oscillator circuit and a second oscillator circuit coupled to the first oscillator circuit. Each of the first oscillator circuit or the second oscillator circuit includes a tank circuit, a cross-coupled transistor pair, and one or more capacitors. The tank circuit is formed by coupling a first inductor with a pair of first capacitors. The cross-coupled transistor pair is coupled to the tank circuit, and one or more second capacitors are coupled to the tank circuit and the cross-coupled transistor pair. Each of the first oscillator circuit or the second oscillator circuit allows tuning of a respective common mode (CM) resonance frequency (F.sub.CM) to be at twice a respective differential resonance frequency (F.sub.D).

A frequency multiplier is provided. A harmonic generator of the frequency multiplier comprises: a harmonic generating core unit; a first resonant tank which is connected to a first output terminal and a second output terminal of the harmonic generating core unit; and a first feedback circuit which is connected to the first output terminal and the second output terminal of the harmonic generating core unit to change the effective resistance of the first resonant tank.

Disclosed is a voltage-controlled oscillator (VCO) including at least an inductor-capacitor (LC) resonant circuit (including varactors that receive a variable input voltage), cross-coupled transistors connected to the LC resonant circuit, and an LC filter connected to a shared source node of the cross-coupled transistors. The cross-coupled transistors can have back gates connected to receive a variable back gate bias voltage (Vbg), which is dependent on Vin to ensure that an optimal relationship between the oscillating frequency (.sub.0) of the LC resonant circuit and the resonant frequency (.sub.1) of the LC filter is continuously maintained to minimize phase noise. For example, if Vin is increased to increase varactor capacitance and, thereby decrease .sub.0, then Vbg is also increased, thereby increasing the voltage (Vs-s) and the capacitance (Cs-s) on the shared source node connected to the LC filter, decreasing .sub.1, and maintaining an optimal relationship of .sub.0=.sub.1/2.

A technique capable of detecting a substrate bias voltage at a low power consumption is provided. The technique including: a voltage boost circuit outputting a boost voltage based on a first clock signal having a first frequency; a voltage drop circuit outputting a drop voltage based on a second clock signal having a second frequency; and a logic circuit block comparing the first frequency and the second frequency and outputting a comparison result between the first frequency and the second frequency in accordance with predetermined criteria is provided.

A frequency multiplier is provided. A harmonic generator of the frequency multiplier comprises: a harmonic generating core unit; a first resonant tank which is connected to a first output terminal and a second output terminal of the harmonic generating core unit; and a first feedback circuit which is connected to the first output terminal and the second output terminal of the harmonic generating core unit to change the effective resistance of the first resonant tank.