A negative feedback inductor and a gate inductor are formed in different wiring layers of a substrate so as to be at least partially overlapped with each other in a plan view. When the lower wiring layer is thinner and the upper wiring layer is thicker, the negative feedback inductor Lc is formed in the lower wiring layer that is thinner.

A negative feedback inductor and a gate inductor are formed in different wiring layers of a substrate so as to be at least partially overlapped with each other in a plan view. When the lower wiring layer is thinner and the upper wiring layer is thicker, the negative feedback inductor Lc is formed in the lower wiring layer that is thinner.

A circuit including: input and output nodes and first and second feedback nodes; a first input amplifier having an input connected to the input node and an output connected to the first feedback node; a second input amplifier having an input connected to the input node and an output connected to the second feedback node; a capacitor connecting the first feedback node and the second feedback node; an amplifier having an input connected to the first feedback node and an output connected to the output node; a base feedback amplifier with an input connected to the output node and an output connected to the first feedback node; a tunable feedback amplifier with an input connected to the output node and an output connected to the second feedback node; and a tuning circuit for varying a transconductance of the tunable feedback circuit and operational frequency of the peaking amplifier circuit.

The DML driver includes: a post driver which supplies a driving current to the LD; and a pre-driver which drives the post driver in response to a modulated signal. The pre-driver has a transistor, a peaking inductor, a peaking inductor, a group delay inhibition inductor, and a peaking capacitor.

An envelope tracking power supply, which includes a parallel amplifier, switching circuitry, and a parallel switching supply, is disclosed. The envelope tracking power supply provides an envelope power supply signal to a load. The parallel amplifier regulates an envelope power supply voltage of the envelope power supply signal based on a setpoint of the envelope power supply voltage. The switching circuitry at least partially provides the envelope power supply signal via a first inductive element and drives an output current from the parallel amplifier toward zero. The parallel switching supply provides an assist current to further drive the output current from the parallel amplifier toward zero based on an estimate of a current in the first inductive element and an estimate of a current in the load.

A technology is described for a repeater. A repeater can comprise: a server port; a donor port; a first uplink (UL) amplification and filtering path coupled between the server port and the donor port, wherein the UL amplification and filtering path is configured to pass a UL signal of a first band and a UL signal of a second band through a first bandpass filter; a first downlink (DL) amplification and filtering path coupled between the server port and the donor port, wherein the first DL amplification and filtering path is configured to pass a DL signal of the first band and a DL signal of a third band through a second bandpass filter.

Methods and apparatus for providing adaptive biasing to power amplifiers. Adaptive bias circuits are configured to provide sharp turn on and/or current clamping to improve the efficiency of a power amplifier over a wide input signal bandwidth. Sharp turn on may be achieved using a subtraction technique to subtract outputs from multiple detectors. Clamping may be achieved using MOSFET device characteristics to pull the device from the triode region into the saturation, subtraction techniques to subtract the outputs from multiple detectors, and/or by using circuit devices, such as diodes.

A circuit for amplifying a source signal generated by a signal source having a first impedance includes a transmission line transformer (TLT) having a first, a second, a third, and a fourth port wherein the TLT is coupled to receive the source signal at the first port and configured to output a corresponding impedance matched signal at the second port, the second port is coupled to the third port of the TLT, the circuit also including a TLT load having a first terminal coupled to the fourth port of the TLT and a second terminal coupled to a reference potential. The circuit additionally includes an amplifier device responsive to the impedance matched signal to generate an amplified signal.

A negative feedback inductor and a gate inductor are formed in different wiring layers of a substrate so as to be at least partially overlapped with each other in a plan view. When the lower wiring layer is thinner and the upper wiring layer is thicker, the negative feedback inductor Lc is formed in the lower wiring layer that is thinner.

A negative feedback inductor and a gate inductor are formed in different wiring layers of a substrate so as to be at least partially overlapped with each other in a plan view. When the lower wiring layer is thinner and the upper wiring layer is thicker, the negative feedback inductor Lc is formed in the lower wiring layer that is thinner.