A method and a device for amplifying an input signal include a power amplifier for amplifying a binary input signal, a modulation device for generating the binary input signal on the basis of the input signal, the input signal being a complex-valued signal and the binary input signal being a real-valued signal, the modulation device including an adding device configured to add the complex-valued input signal to a complex-valued carrier signal of a predefined frequency and to thus generate a resulting complex-valued signal, and the modulation device including a combination device connected downstream from the adding device and configured to generate the real-valued binary input signal from the real part and the imaginary part of the resulting complex-valued signal by combining the real part and the imaginary part of the resulting complex-valued signal.

The disclosure presents a method and an amplifier system for minimizing variation in an acoustical signal caused by variation in gain of an amplifier, comprising a battery for providing a supply voltage to the amplifier, a digital signal processor for providing the acoustical signal to the amplifier, a controller unit receiving an enablement signal when the supply voltage is in an offset mode, and based on the enablement signal requesting a measured voltage during a time period, and a first analog-to-digital converter configured for measuring the supply voltage to the amplifier when receiving the request from the controller unit or the first analog-to-digital converter is configured for measuring the supply voltage to the amplifier continuously, and where variations in the measured voltage relates to variations in the supply voltage during the time period. Furthermore, the controller unit is configured to predict offset modes (i.e. changes) in the supply voltage based on the enablement signals and a fitting of the measured voltages, and wherein the controller unit is configured to generate a compensating signal based on the fitting and transmit the compensating signal to the digital signal processor, the digital signal processor is then configured to minimize variation in the acoustical signal at the output of the amplifier by compensating the variation in gain of the amplifier based on the compensating signal.

A class-D amplifier includes measurement of speaker current via the low-side drive transistors of the amplifier. In one embodiment, a class-D amplifier includes two high-side transistors, two low-side transistors, a first sense resistor, a second sense resistor, and a sigma delta analog to digital converter (σΔ ADC). The two high-side transistors and two low-side transistors are connected as a bridge to drive a bridge tied speaker. The first sense resistor is connected between a first of the low-side transistors and a low-side reference voltage. The second sense resistor is connected between a second of the low-side transistors and the low-side reference voltage. The ΣΔ ADC is coupled to the bridge to measure voltage across the first sense resistor and the second sense resistor.

A photoelectric conversion apparatus includes a pixel which includes a photoelectric conversion element; a signal line connected with the pixel; a voltage-current conversion unit configured to convert a voltage signal of the signal line into current; and a conversion unit that includes an oversampling type analog-to-digital conversion circuit that converts the current outputted from the voltage-current conversion unit into digital signals. The voltage-current conversion unit converts the voltage signal of the signal line into the current without sampling and holding and outputs the converted current to the conversion unit.

This application relates to ADC circuitry. An ADC circuit (200) has first and second conversion paths (201a, 201b) for converting analogue signals to digital and is operable in first and second modes. In the first mode, the first and second conversion paths are connected to respective first and second input nodes (202a, 202b) to receive and convert full scale first and second analogue input signals (Ain1, Ain2) to separate digital outputs (Dout1, Dout2). In the second mode, the first and second conversion paths are both connected to the first input node (202a), to convert the first analogue input signal (Ain1) to respective first and second digital signals, and the first and second conversion paths are configured for processing different signal levels of the first analogue input signal. A selector (207) select the first digital signal or the second digital to be output as an output signal based on an indication of amplitude of the first analogue input signal.

This application describes time-encoding modulator circuitry (200), and in particular a PWM modulator suitable for use for a class-D amplifier. A forward signal path receives a digital input signal (Din) and outputs an output PWM signal (Sout) and includes a first PWM modulator (101). A feedback path provides feedback to an input of the first PWM modulator (101). The feedback path includes an ADC (203) which receive a first PWM signal (Sa) derived from the output PWM signal. The ADC (203) includes a second PWM modulator (401) which generates a second PWM signal (Sb) based on the first PWM signal. A controller (201) controls the second PWM modulator such that a PWM carrier of the second PWM signal is phase and frequency matched to a PWM carrier of the output PWM signal.

A startup circuit for a bandgap reference source can include a first transistor coupled to a supply source and configured to provide a current to a reference resistance when the bandgap reference source is turned on, to thereby provide a reference voltage at a first node between the first transistor and the reference resistance, a second transistor coupled to the supply source to provide a second node therebetween, the second transistor having a gate coupled to the first node, such that the second transistor is off and a startup voltage at the second node is up when the reference voltage is at or below a threshold voltage, and the second transistor is on and the startup voltage at the second node is down when the reference voltage exceeds the threshold voltage, and a third transistor implemented between the supply source and a startup node of a bandgap core, the third transistor having a gate coupled to the second node such that the third transistor turns on to inject a startup current to the startup node when the startup voltage is up, and turns off when the startup voltage is down.

A class-D amplifier having an output driver with a first, second, and third driver, the output driver having a first output coupled to the first and third drivers, a second output coupled to the second driver; a sensing resistor coupled in series between the first driver and the first output; and a pulse width modulation (PWM) controller coupled to the inputs of the drivers and configured to receive an audio input signal; control a PWM generator to generate a first pulse signal and a second pulse signal based on the audio input signal and a power supply input; determine a voltage drop across the sensing resistor; and, responsive to the voltage drop being greater than a threshold, sequence control of the first pulse signal to the first driver and switch a voltage at the first driver to an increased voltage based on the voltage drop.

In some embodiments, an audio amplifier can include an input for receiving a signal to be amplified, and an amplification stage configured to amplify the signal based on pulse width modulation and provide the amplified signal at an output node. The audio amplifier can further include a feedback circuit implemented between the output node and the input node. The feedback circuit can include a series arrangement of a high bandwidth input common mode loop and a low bandwidth output common mode loop, with the low bandwidth output common mode loop configured to provide a desired phase change for the high bandwidth input common mode loop.

In some embodiments, a calibration circuit for an audio amplification system can include a tone generator configured to provide a tone having a frequency to an input path of an audio amplifier, such that an input signal provided to the audio amplifier includes the tone, a a first sampling circuit configured to sample an output signal at an output node of the audio amplifier, and a second sampling circuit configured to sample the input signal at an input node of the audio amplifier. The calibration circuit can further include a gain adjustment circuit configured to generate a correction signal based on the sampled output signal and the sampled input signal to correct for a gain variation of the audio amplifier.