Patent classifications
H03F3/45233
DIFFERENTIAL AMPLIFIER, RECEIVER, AND CIRCUIT
A differential amplifier which does not have an effect of noise resistance deterioration, waveform distortion, and a lower bandwidth while having a wide input range is realized. The differential amplifier does not cause deterioration in a signal quality due to an increase in an input load, and it is not necessary to additionally provide a configuration for generating a reference voltage. The differential amplifier includes a differential amplification circuit and an output circuit for amplifying and outputting a differential output from the differential amplification circuit. The differential amplification circuit includes a first conductive type first differential pair which supplies output currents according to a positive phase input signal and a reverse phase input signal to the output circuit, a second conductive type second differential pair which supplies output currents according to a positive phase input signal and a reverse phase input signal to the output circuit, a detector which detects an operation state of a differential pair, and an alternative current supplying circuit which supplies an alternative current for the output current of the differential pair which has been turned off to the output circuit.
Operational amplifier
Disclosed herein is an operational amplifier including a non-inverting input terminal, an inverting input terminal, a P-type metal oxide semiconductor input differential pair, a first input tail current source, an N-type metal oxide semiconductor input differential pair, a second input tail current source, an output stage, a first correction circuit, and a second correction circuit. The first correction circuit and the second correction circuit operate over an operation region of the P-type metal oxide semiconductor input differential pair, an operation region of the N-type metal oxide semiconductor input differential pair, and a transition region in which both the P-type metal oxide semiconductor input differential pair and the N-type metal oxide semiconductor input differential pair operate.
OPERATIONAL AMPLIFIER
Disclosed herein is an operational amplifier including a non-inverting input terminal, an inverting input terminal, a P-type metal oxide semiconductor input differential pair, a first input tail current source, an N-type metal oxide semiconductor input differential pair, a second input tail current source, an output stage, a first correction circuit, and a second correction circuit. The first correction circuit and the second correction circuit operate over an operation region of the P-type metal oxide semiconductor input differential pair, an operation region of the N-type metal oxide semiconductor input differential pair, and a transition region in which both the P-type metal oxide semiconductor input differential pair and the N-type metal oxide semiconductor input differential pair operate.
HYSTERESIS COMPARATOR
The present invention discloses a hysteresis comparator comprising an input stage, a hysteresis current generating circuit and an output stage. In the operation of the hysteresis comparator, the input stage is configured to receive a pair of differential input signals to generate at least one differential current signal; the hysteresis current generating circuit is configured to generate at least one hysteresis current to adjust the differential current signal to generate an adjusted differential current signal, wherein the hysteresis current generating circuit includes a common mode voltage detecting circuit for detecting a common mode voltage of the differential input signal for generating the hysteresis current; and the output stage is configured to generate an output signal according to the adjusted differential current signal.
Hysteresis comparator
The present invention discloses a hysteresis comparator comprising an input stage, a hysteresis current generating circuit and an output stage. In the operation of the hysteresis comparator, the input stage is configured to receive a pair of differential input signals to generate at least one differential current signal; the hysteresis current generating circuit is configured to generate at least one hysteresis current to adjust the differential current signal to generate an adjusted differential current signal, wherein the hysteresis current generating circuit includes a common mode voltage detecting circuit for detecting a common mode voltage of the differential input signal for generating the hysteresis current; and the output stage is configured to generate an output signal according to the adjusted differential current signal.
Semiconductor device
An object of the present invention is to provide a semiconductor device amplifying input voltages of various standards across a wide range. According to an embodiment, a semiconductor device includes a first differential amplifier that performs an amplifying operation in a first voltage range, a second differential amplifier that performs an amplifying operation in a second voltage range, a first protection unit that conducts between the source and the drain of each pair of differential transistors included in the first and second differential amplifiers in a third voltage range, a third differential amplifier that performs an amplifying operation in a fourth voltage range, a fourth differential amplifier that performs an amplifying operation in a fifth voltage range, and a second protection unit that conducts between the source and the drain of each pair of differential transistors included in the third and fourth differential amplifiers in a sixth voltage range.
Differential amplifier, receiver, and circuit
A differential amplifier which does not have an effect of noise resistance deterioration, waveform distortion, and a lower bandwidth while having a wide input range is realized. The differential amplifier does not cause deterioration in a signal quality due to an increase in an input load, and it is not necessary to additionally provide a configuration for generating a reference voltage. The differential amplifier includes a differential amplification circuit and an output circuit for amplifying and outputting a differential output from the differential amplification circuit. The differential amplification circuit includes a first conductive type first differential pair which supplies output currents according to a positive phase input signal and a reverse phase input signal to the output circuit, a second conductive type second differential pair which supplies output currents according to a positive phase input signal and a reverse phase input signal to the output circuit, a detector which detects an operation state of a differential pair, and an alternative current supplying circuit which supplies an alternative current for the output current of the differential pair which has been turned off to the output circuit.
Rail-To-Rail Source Follower
A source follower method, system, and apparatus provide rail-to-rail capability to an output voltage terminal of a voltage follower feedback biased CMOS output circuit by providing a control circuit which includes first and second bypass transistors that are connected in parallel between first and second control circuit input/output terminals and controlled, respectively, by first and second control circuit inputs, and which also includes first and second current sources for injecting source and sink currents in the output node as a function, respectively, of a first bypass current through the first bypass transistor which turns ON when the output voltage rises above a top threshold voltage level and of a second bypass current through the second bypass transistor which turns ON when the output voltage falls below a bottom threshold voltage level.
Rail-to-rail source follower
A source follower method, system, and apparatus provide rail-to-rail capability to an output voltage terminal of a voltage follower feedback biased CMOS output circuit by providing a control circuit which includes first and second bypass transistors that are connected in parallel between first and second control circuit input/output terminals and controlled, respectively, by first and second control circuit inputs, and which also includes first and second current sources for injecting source and sink currents in the output node as a function, respectively, of a first bypass current through the first bypass transistor which turns ON when the output voltage rises above a top threshold voltage level and of a second bypass current through the second bypass transistor which turns ON when the output voltage falls below a bottom threshold voltage level.
SEMICONDUCTOR DEVICE
An object of the present invention is to provide a semiconductor device amplifying input voltages of various standards across a wide range. According to an embodiment, a semiconductor device includes a first differential amplifier that performs an amplifying operation in a first voltage range, a second differential amplifier that performs an amplifying operation in a second voltage range, a first protection unit that conducts between the source and the drain of each pair of differential transistors included in the first and second differential amplifiers in a third voltage range, a third differential amplifier that performs an amplifying operation in a fourth voltage range, a fourth differential amplifier that performs an amplifying operation in a fifth voltage range, and a second protection unit that conducts between the source and the drain of each pair of differential transistors included in the third and fourth differential amplifiers in a sixth voltage range.