H03F3/45376

Apparatus for optimized turn-off of a cascode amplifier
11527998 · 2022-12-13 · ·

An apparatus for turning off a cascode amplifier having a common-base transistor and a common-emitter transistor is disclosed that includes the cascode amplifier, a feedback circuit, and a bias circuit. The feedback circuit is configured to receive a collector-voltage from the collector of the common-emitter transistor when the common-emitter transistor is switched to a first OFF state and produce a first feedback signal. The collector-voltage is equal to an emitter voltage of the common-base transistor and the collector-voltage increases in response to switching the common-emitter transistor to the first OFF state. The bias circuit is configured to receive the first feedback signal and produce a bias-voltage. A first base-voltage is produced from the bias-voltage. The cascode amplifier is configured to receive the first base-voltage and a second base-voltage. The common-base transistor is configured to switch to a second OFF state in response to receiving the second base-voltage.

APPARATUS FOR OPTIMIZED TURN-OFF OF A CASCODE AMPLIFIER
20230086201 · 2023-03-23 · ·

An apparatus for turning off a cascode amplifier having a common-gate transistor and a common-source transistor is disclosed that includes the cascode amplifier, a feedback circuit, and a bias circuit. The feedback circuit is configured to receive a drain-voltage from the drain of the common-source transistor when the common-source transistor is switched to a first OFF state and produce a first feedback signal. The drain-voltage is equal to a source voltage of the common-gate transistor and the drain-voltage increases in response to switching the common-source transistor to the first OFF state. The bias circuit is configured to receive the first feedback signal and produce a bias-voltage. A first gate-voltage is produced from the bias-voltage. The cascode amplifier is configured to receive the first gate-voltage and a second gate-voltage. The common-gate transistor is configured to switch to a second OFF state in response to receiving the second gate-voltage.

BATTERY MANAGEMENT SYSTEM (BMS) AND APPLICATION
20230125811 · 2023-04-27 ·

A battery management system, comprising a bank of serially connected battery cells having a lower most cell connected to ground and an uppermost cell connected to one port of a load, the other port of which being connected to ground; circuitry for sampling the output voltage of a selected battery cell; a voltage to current converter for receiving the sampled battery cell output voltage, which consists of a current source that outputs current being proportional to the sampled output voltage a predetermined resistor, connected between the current source output and ground, into which the output current of the current source is fed; a control circuit, adapted to measure the voltage generated across the predetermined resistor with respect to ground; determine whether or not the selected battery cell is fully charged according to the difference between the measured voltage and a predetermined threshold voltage; repeat the process for additional battery cells of the bank.

High voltage input circuit for a differential amplifier

A differential input circuit (FIG. 3A) is disclosed. The circuit includes a first input terminal (drain of 310) and a second input terminal (drain of 312). A first input transistor (310) has a first control terminal and has a current path coupled to the first input terminal. A second input transistor (312) has a second control terminal and has a current path coupled to the second input terminal. A third transistor (306) has a third control terminal and has a current path between a first differential input terminal (Vin+) and the first control terminal. A fourth transistor (308) has a fourth control terminal and has a current path between a second differential input terminal (Vin−) and the second control terminal.

Semiconductor device and memory system

According to one embodiment, in a first differential amplifier circuit of a semiconductor device, a first transistor receives an input signal at the gate. A second transistor forms a differential pair with the first transistor. The second transistor receives a reference signal at the gate. A third transistor is connected in series with the first transistor. A fourth transistor is connected in series with the second transistor. A fifth transistor is disposed on the output side. The fifth transistor forms a first current mirror circuit with the fourth transistor. A sixth transistor is connected to the drain of the second transistor in parallel with the fourth transistor. The sixth transistor forms a second current mirror circuit with the fifth transistor. A first discharge circuit is connected to the source of the sixth transistor.

Operational amplifier
11316480 · 2022-04-26 · ·

An operational amplifier includes a voltage terminal; a common terminal; a first amplification stage for receiving a differential signal pair to generate a single-end amplification signal; a first buffer for generating a first voltage according to the single-end amplification signal; a first diode for reducing the first voltage to generate a second voltage; a second amplification stage for amplifying the second voltage to generate a third voltage; a voltage stabilizing circuit for stabilizing the third voltage; a second diode coupled between the second amplification stage and the common terminal; a second buffer for generating an output voltage according to the third voltage; and a current mirror coupled to the common terminal, the first amplification stage, the first diode and the second amplification stage.

Apparatus for optimized turn-off of a cascode amplifier
11777450 · 2023-10-03 · ·

An apparatus for turning off a cascode amplifier having a common-gate transistor and a common-source transistor is disclosed that includes the cascode amplifier, a feedback circuit, and a bias circuit. The feedback circuit is configured to receive a drain-voltage from the drain of the common-source transistor when the common-source transistor is switched to a first OFF state and produce a first feedback signal. The drain-voltage is equal to a source voltage of the common-gate transistor and the drain-voltage increases in response to switching the common-source transistor to the first OFF state. The bias circuit is configured to receive the first feedback signal and produce a bias-voltage. A first gate-voltage is produced from the bias-voltage. The cascode amplifier is configured to receive the first gate-voltage and a second gate-voltage. The common-gate transistor is configured to switch to a second OFF state in response to receiving the second gate-voltage.

APPARATUS FOR OPTIMIZED TURN-OFF OF A CASCODE AMPLIFIER
20230387858 · 2023-11-30 · ·

An apparatus for turning off a cascode amplifier having a common-base transistor and a common-emitter transistor is disclosed that includes the cascode amplifier, a feedback circuit, and a bias circuit. The feedback circuit is configured to receive a collector-voltage from the collector of the common-emitter transistor when the common-emitter transistor is switched to a first OFF state and produce a first feedback signal. The collector-voltage is equal to a emitter voltage of the common-base transistor and the collector-voltage increases in response to switching the common-emitter transistor to the first OFF state. The bias circuit is configured to receive the first feedback signal and produce a bias-voltage. A first base-voltage is produced from the bias-voltage. The cascode amplifier is configured to receive the first base-voltage and a second base-voltage. The common-base transistor is configured to switch to a second OFF state in response to receiving the second base-voltage.

DIFFERENTIAL ACTIVE PIXEL
20220321809 · 2022-10-06 · ·

Methods and apparatus for a pixel system for providing power supply noise rejection. A photodetector has a first terminal coupled to a voltage supply and a second terminal and a differential transimpedance amplifier has a first input coupled to the second terminal of the photodetector. The differential transimpedance amplifier is configured to convert a singled ended output on the second terminal of the photodetector to a differential signal. A bias circuit is coupled to the differential transimpedance amplifier to bias the differential transimpedance amplifier and the photodetector.

DIFFERENTIAL ACTIVE PIXEL
20220321810 · 2022-10-06 · ·

Methods and apparatus for a pixel system for capturing active imaging data. The system includes a photodetector having a first terminal coupled to a voltage supply and a second terminal and a differential transimpedance amplifier having a first input coupled to the second terminal of the photodetector. A voltage discriminator has an input coupled to an output of the differential transimpedance amplifier and an output.