The present application discloses an amplifier and a method for controlling a common mode voltage thereof. The method includes: generating a control signal according to a positive-terminal input signal, a negative-terminal input signal and a target common mode voltage; and coupling the controlling signal to a first terminal of a positive-terminal capacitor and a first terminal of a negative-terminal capacitor, to adjust degree of conduction of a positive-terminal p-type transistor and degree of conduction of a negative-terminal p-type transistor, or to adjust degree of conduction of a positive-terminal n-type transistor and degree of conduction of a negative-terminal n-type transistor, thereby changing a common mode voltage.

The application discloses a circuit, including: a positive-terminal p-type transistor; a negative-terminal p-type transistor; a positive-terminal n-type transistor, wherein the positive-terminal p-type transistor and the positive-terminal n-type transistor are cascoded between a first reference voltage and a second reference voltage; a negative-terminal n-type transistor, wherein the negative-terminal p-type transistor and the negative-terminal n-type transistor are cascoded between the first reference voltage and the second reference voltage; a first positive-terminal capacitor, a top plate of the first positive-terminal capacitor is coupled to a gate of the positive-terminal n-type transistor; a first negative-terminal capacitor, a top plate of the first negative-terminal capacitor is coupled to a gate of the negative-terminal n-type transistor; a first control circuit, arranged to generate a first control signal to bottom plates of the first positive-terminal capacitor and the first negative-terminal capacitor according to the positive-terminal output signal, the negative-terminal output signal and the target common mode voltage.

An amplifier circuit. In some embodiments, the amplifier circuit includes: a telescopic amplifier, and a common mode feedback amplifier. The telescopic amplifier has a first signal input, a second signal input, a first output, a second output, a common mode feedback input, a first pole-splitting capacitor, and a second pole-splitting capacitor. The common mode feedback amplifier has an output connected to the common mode feedback input of the telescopic amplifier. The first pole-splitting capacitor is connected between the common mode feedback input of the telescopic amplifier and the first output of the telescopic amplifier, and the second pole-splitting capacitor is connected between the common mode feedback input of the telescopic amplifier and the second output of the telescopic amplifier.

An amplifier includes an output stage circuit and a compensation circuit. The output stage circuit includes a first input terminal, a second input terminal, a first output terminal, and a second output terminal. The compensation circuit includes a first capacitor, a second capacitor, a third capacitor, and a fourth capacitor. The first capacitor is coupled between the first input terminal and the second output terminal, and is configured to operate as a first Miller capacitor. The second capacitor is coupled between the second input terminal and the first output terminal, and is configured to operate as a second Miller capacitor. The third capacitor and the fourth capacitor are configured to alternately operate as the first Miller capacitor and the second Miller capacitor according to at least one clock signal.

A differential pair gain stage is disclosed. In one embodiment, the gain stage includes a differential pair of depletion-mode transistors, including a first and a second n-type transistor. In certain embodiments of the invention, the depletion mode transistor may be GaN (gallium nitride) field effect transistors. The gain stage includes an active load including one or more depletion mode transistors electrically coupled to at least one of the drains of depletion mode transistors of the differential pair. The active load may include a source follower for maintaining the AC voltages at the drains of the differential pair at a constant value and may further include a casocde stage for setting a fixed drain source voltage across the output transistors to increase the output impedance and gain of the stage.

An amplifier includes an output stage circuit and a compensation circuit. The output stage circuit includes a first input terminal, a second input terminal, a first output terminal, and a second output terminal. The compensation circuit includes a first capacitor, a second capacitor, a third capacitor, and a fourth capacitor. The first capacitor is coupled between the first input terminal and the second output terminal, and is configured to operate as a first Miller capacitor. The second capacitor is coupled between the second input terminal and the first output terminal, and is configured to operate as a second Miller capacitor. The third capacitor and the fourth capacitor are configured to alternately operate as the first Miller capacitor and the second Miller capacitor according to at least one clock signal.

An amplifier circuit. In some embodiments, the amplifier circuit includes: a telescopic amplifier, and a common mode feedback amplifier. The telescopic amplifier has a first signal input, a second signal input, a first output, a second output, a common mode feedback input, a first pole-splitting capacitor, and a second pole-splitting capacitor. The common mode feedback amplifier has an output connected to the common mode feedback input of the telescopic amplifier. The first pole-splitting capacitor is connected between the common mode feedback input of the telescopic amplifier and the first output of the telescopic amplifier, and the second pole-splitting capacitor is connected between the common mode feedback input of the telescopic amplifier and the second output of the telescopic amplifier.

The application discloses a circuit, including: a positive-terminal p-type transistor; a negative-terminal p-type transistor; a positive-terminal n-type transistor, wherein the positive-terminal p-type transistor and the positive-terminal n-type transistor are cascoded between a first reference voltage and a second reference voltage; a negative-terminal n-type transistor, wherein the negative-terminal p-type transistor and the negative-terminal n-type transistor are cascoded between the first reference voltage and the second reference voltage; a first positive-terminal capacitor, a top plate of the first positive-terminal capacitor is coupled to a gate of the positive-terminal n-type transistor; a first negative-terminal capacitor, a top plate of the first negative-terminal capacitor is coupled to a gate of the negative-terminal n-type transistor; a first control circuit, arranged to generate a first control signal to bottom plates of the first positive-terminal capacitor and the first negative-terminal capacitor according to the positive-terminal output signal, the negative-terminal output signal and the target common mode voltage.

A power amplifier of the present invention comprises a first cascode including a MOSFET and a JFET and a first capacitor electrically connected between the source and the drain of the JFET. Two such power amplifiers in parallel form a differential power amplifier. In the differential amplifier a second capacitor can be electrically connected between the source and the drain of the second JFET. Another differential power amplifier comprises a first capacitor electrically connected between the gate of the first MOSFET and the source of the second MOSFET, and a second capacitor electrically connected between the gate of the second MOSFET and the source of the first MOSFET. Some of these differential power amplifiers also include capacitors electrically connected between the sources and the drains of the JFETs.

A power amplifier of the present invention comprises a first cascode including a MOSFET and a JFET and a first capacitor electrically connected between the source and the drain of the JFET. Two such power amplifiers in parallel form a differential power amplifier. In the differential amplifier a second capacitor can be electrically connected between the source and the drain of the second JFET. Another differential power amplifier comprises a first capacitor electrically connected between the gate of the first MOSFET and the source of the second MOSFET, and a second capacitor electrically connected between the gate of the second MOSFET and the source of the first MOSFET. Some of these differential power amplifiers also include capacitors electrically connected between the sources and the drains of the JFETs.