A method and apparatus for correcting baseline wander is disclosed. The method and apparatus may include generating filtered signals by filtering input signals using a filter circuit. An equalizer circuit using the filtered signals may generate output signals. Feedback networks may be configured to couple a respective output signal to a corresponding filtered signal.

A method and apparatus for correcting baseline wander is disclosed. The method and apparatus may include generating filtered signals by filtering input signals using a filter circuit. An equalizer circuit using the filtered signals may generate output signals. Feedback networks may be configured to couple a respective output signal to a corresponding filtered signal.

A differential amplifier comprises a first differential circuitry structure including a first part comprising at least one branch of transistors and a second part comprising at least one branch of transistors, and a second circuitry structure. The second circuitry structure has a first non-linear device and a second non-linear device. The non-linear devices each comprise a transistor having a control node connected to a differential output terminals of the differential amplifier. A common center node of the non-linear devices is connected to a control node of one of the transistors of each branch of the first part having a differential output terminal. Amplifier applications, communication devices and network nodes are also disclosed.

A differential amplifier comprises a first differential circuitry structure including a first part comprising at least one branch of transistors and a second part comprising at least one branch of transistors, and a second circuitry structure. The second cicuitry structure has a first non-linear device and a second non-linear device. The non-linear devices each comprise a transistor having a control node connected to a differential output terminals of the differential amplifier. A common centre node of the non-linear devices is connected to a control node of one of the transistors of each branch of the first part having a differential output terminal. Amplifier applications, communication devices and network nodes are also disclosed.

A power amplifier includes an amplifier element and overstress management circuitry coupled to the amplifier element. The overstress management circuitry is configured to detect an overstress condition of the amplifier element and adjust one or more operating parameters of the amplifier element in response to the detection of an overstress condition of the amplifier element. Using the overstress management circuitry prevents damage to the amplifier element that may occur due to uncorrected overstress conditions which may degrade or destroy a gate oxide of the amplifier element. Accordingly, the longevity of the amplifier element is improved.

Radio frequency power amplifier circuitry includes an amplifier element, power supply modulation circuitry, and bias modulation circuitry. The amplifier element is configured to amplify an RF input signal using a modulated power supply signal and a modulated bias signal to produce an RF output signal. The power supply modulation circuitry is coupled to the amplifier element and configured to provide the modulated power supply signal. The bias modulation circuitry is coupled to the amplifier element and the power supply modulation circuitry and configured to receive the modulated power supply signal and provide the modulated bias signal. Notably, the modulated bias signal is a function of the modulated power supply signal such that the modulated bias signal is configured to maintain a small signal gain of the amplifier element and the phase of the RF input signal at a constant value as the modulated power supply signal changes.

An amplifying system with increased linearity is disclosed. The amplifying system includes a first gain stage with a first gain characteristic, a second gain stage with a second gain characteristic, and bias circuitry configured to substantially maintain alignment of distortion inflection points between the first gain characteristic and the second gain characteristic during operation. The bias circuitry is configured to further maintain alignment of the distortion inflection points between the first gain characteristic and the second gain characteristic over design corners by providing substantially constant headroom between quiescent bias voltage and turnoff of the first gain stage and the second gain stage. In some embodiments the first gain characteristic is expansive and the second gain characteristic is compressive. In other embodiments the first gain characteristic is compressive and the second gain characteristic is expansive. In some embodiments the first gain stage is configured to provide RF degeneration control of gain.

RF PA circuitry includes an amplifier stage, gain compensation circuitry, and an adder. The amplifier stage is configured to receive and amplify an RF input signal to provide an RF output signal. The gain compensation circuitry is coupled in parallel with the amplifier stage and configured to receive the RF input signal and provide a gain compensation signal, wherein the gain compensation signal is configured to linearize at least a portion of the gain response of the amplifier stage or the RF PA circuitry in general. The adder is coupled between an output of the amplifier stage and the gain compensation stage and is configured to receive and add the RF output signal and the gain compensation signal to provide a linearized RF output signal.