An object of the disclosure is to provide a slope enhancement circuit, comprising an amplifier and a specific arrangement of capacitors and switches, further comprising a current digital to analog converter (IDAC), in a switched regulated current mirror. A method of sample and hold exploits the transient dynamics of the switched current mirror, to enhance the output current slope during PWM operation. A further object of the disclosure is to provide a low power, high speed switching type of regulated current mirror architecture. Still further, another object of the disclosure is to provide quick response to a sudden demand in current with a high degree of accuracy. Still further, another object of the disclosure is to provide a significant savings in circuit area.

An object of the disclosure is to provide a slope enhancement circuit, comprising an amplifier and a specific arrangement of capacitors and switches, further comprising a current digital to analog converter (IDAC), in a switched regulated current mirror. A method of sample and hold exploits the transient dynamics of the switched current mirror, to enhance the output current slope during PWM operation. A further object of the disclosure is to provide a low power, high speed switching type of regulated current mirror architecture. Still further, another object of the disclosure is to provide quick response to a sudden demand in current with a high degree of accuracy. Still further, another object of the disclosure is to provide a significant savings in circuit area.

A differential signal conditioner circuit with common mode voltage (CMV) compensation is provided. The circuit includes a signal multiplexer that receives a input signal that includes a high and low signal and a reference CMV signal, a differential amplifier coupled to the signal multiplexer that receives the reference CMV signal and outputs a CMV error value during a first cycle, and receives the input signal and outputs an amplified difference signal during a second cycle. The circuit also includes a CMV measurement circuit that receives the reference CMV signal and outputs a confirmation value during the first cycle, and receives the input signal and outputs a CMV compensation value during the second cycle, and a processing element that receives the CMV error value, the amplified difference signal, the CMV compensation value, and a differential amplifier gain value and generates a CMV compensated output based on the received signals and values.

A differential signal conditioner circuit with common mode voltage (CMV) compensation is provided. The circuit includes a signal multiplexer that receives a input signal that includes a high and low signal and a reference CMV signal, a differential amplifier coupled to the signal multiplexer that receives the reference CMV signal and outputs a CMV error value during a first cycle, and receives the input signal and outputs an amplified difference signal during a second cycle. The circuit also includes a CMV measurement circuit that receives the reference CMV signal and outputs a confirmation value during the first cycle, and receives the input signal and outputs a CMV compensation value during the second cycle, and a processing element that receives the CMV error value, the amplified difference signal, the CMV compensation value, and a differential amplifier gain value and generates a CMV compensated output based on the received signals and values.