A circuit board according to an embodiment includes an insulating layer including a first via hole; a first via disposed in the first via hole of the insulating layer; wherein the first via includes: a first via part disposed in a first region of the first via hole; and a second via part disposed in a second region other than the first region of the first via hole; wherein the second region is a central region of the first via hole, and the first region is an outer region surrounding the second region; wherein the first via part and the second via part includes: a first surface in contact with each other; and a second surface other than the first surface exposed on the insulating layer; wherein the first surface has a first surface roughness; wherein the second surface has a second surface roughness different from the first surface roughness.

A cable assembly, a signal transmission structure, and an electronic device are provided. The signal transmission structure includes a circuit board (2), a chip (1), and a cable assembly (3). The chip (1) is assembled on one side of the circuit board (2), and the cable assembly (3) is assembled on the other side of the circuit board (2). The cable assembly (3) includes a cable (31), and the circuit board (2) includes a plurality of conductive holes (22). The chip (1) is electrically connected to the cable (31) of the cable assembly (3) by using the conductive hole (22), to transmit a signal of the chip (1) by using the cable (31). In this technical solution, wires do not need to be disposed in a large area inside the circuit board (2).

A method for contacting and rewiring an electronic component embedded in a PCB in the following manner is disclosed. A first permanent resist layer is applied to one contact side of the PCB. The first permanent resist layer is structured to produce exposures in the area of contacts of the electronic component. A second permanent resist layer is applied onto the structured first permanent resist layer. The second permanent resist layer is structured to expose the exposures in the area of the contacts and to produce exposures in line with the desired conductor tracks. The exposures are chemically coated with copper the copper is electric-plated to the exposures. Excess copper in the areas between the exposures is removed.

A circuit board device includes a multilayer structure, a main ground area and a circuit module. The multilayer structure includes a plurality of plates. The main ground area is arranged in the multilayer structure. The circuit module includes a differential signal circuit and a surrounding circuit module. The differential signal circuit is located in the multilayer structure, and includes a positive signal pad and a negative signal pad. The positive signal pad is located on a configuration surface of one of the plates. The negative signal pad is located on the disposition surface, and is separated from the positive signal pad. The surrounding circuit module is located on the disposition surface, and electrically connected to the main ground area. The surrounding circuit module surrounds the positive signal pad and the negative signal pad in an enclosing way, and is physically separated from the differential signal circuit.

The present disclosure discloses a multilayer circuit board comprising a plurality of metal layers, a blind via and/or a buried via, the multilayer circuit board is capable of transmitting signal between the different metal layers. The blind via has a pad on a non-opening side of the blind via. An upper or lower layer metal layer on the non-opening side of the blind via adjacent to the blind via has a first hole which is located in a position corresponding to the pad on the non-opening side of the blind via in a depth direction of the blind via; and/or an upper and/or lower layer adjacent to the buried via has a second hole which is located in a position corresponding to the pad of an upper and/or lower orifice of the buried via in a depth direction of the buried via.

A component carrier with a stack including an electrically insulating layer structure and an electrically insulating structure has a tapering blind hole formed in the stack and an electrically conductive plating layer extending along at least part of a horizontal surface of the stack outside of the blind hole and along at least part of a surface of the blind hole. A minimum thickness of the plating layer at a bottom of the blind hole is at least 8 μm. A demarcation surface of the plating layer in the blind hole and facing away from the stack extends laterally outwardly from the bottom of the blind hole towards a lateral indentation and extends laterally inwardly from the indentation up to an outer end of the blind hole. An electrically conductive structure fills at least part of a volume between the plating layer and an exterior of the blind hole.

The present disclosure provides an adapter board, a for manufacturing the same and a circuit board assembly. The adapter board includes a board body, a first component buried in the board body, a first connector located on a first surface of the board body and configured to be connected with a circuit board and a second component, a second connector located on a second surface of the board body and configured to be connected with a second component, a first conductive body and a second conductive body buried in the board body. One end of the first conductive body is connected with the first component. The other end of the first conductive body is connected with the first connector. One end of the second conductive body is connected with the first component. The other end of the second conductive body is connected with the second connector

A wiring board includes: first and second insulating layers; a first wiring conductor layer located between the first and second insulating layers and including a first via land; a second wiring conductor layer located on the second insulating layer and including a second via land; a via hole penetrating from the upper to lower surfaces of the second insulating layer; and a via conductor located in the via hole and electrically connecting the first second via lands. The via conductor is located on the inner surface of the via hole and on the first via land via a first base layer containing nichrome and a second base layer located on the upper surface of the first base layer and containing the same metal as the via conductor. An alloy layer containing tin and nichrome is located between the first via land and the first base layer.

A high-frequency circuit includes a first dielectric layer, a circuit layer, a second dielectric layer arranged in this order, the circuit layer includes a transmission line of a high-frequency signal and a ground pattern disposed around the transmission line. An electromagnetic wave shield is disposed in the first dielectric layer and the second dielectric layer around the transmission line. The electromagnetic wave shield includes a first ground electric conductor formed on an inner surface of at least one first hole formed to extend through the first dielectric layer without extending through the ground pattern, and a second ground electric conductor formed on an inner surface of at least one second hole formed to extend through the second dielectric layer without extending through the ground pattern. The first ground electric conductor and the second ground electric conductor are each electrically connected to the ground pattern.

Forming, in a printed-wiring board, a via sufficiently filled without residual smear, for use in an insulating layer and the size of the via to be formed. A via of a printed-wiring board comprises a first filling portion which fills at least a center portion of a hole, and a second filling portion which fills a region of the hole that is not filled with the first filling portion. An interface which exists between the second and first filling portions, or an interface which exists between the second filling portion and an insulating layer and the first filling portion has the shape of a truncated cone comprising a tapered surface which is inclined to become thinner from a first surface toward a second surface, and an upper base surface which is positioned in parallel to the second surface and closer to the first surface than to the second surface.