Patent classifications
H05K3/0041
Component Carrier and Method of Manufacturing a Component Carrier
A component carrier includes a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure. The at least one electrically conductive layer structure includes a first trace. A tapering trench is formed in the at least one electrically insulating layer structure beside and below the first trace. A method of manufacturing the component carrier is also described.
Wiring board and method for manufacturing the same
A wiring board includes a resin insulating layer having a component mounting surface, first connection pads formed on the component mounting surface of the resin insulating layer, second connection pads formed on the component mounting surface of the resin insulating layer such that the second connection pads are surrounding the first connection pads, and a protruding part including a metal material and formed on the component mounting surface of the resin insulating layer such that a portion of the protruding part is embedded in the resin insulating layer and that the protruding part is positioned between the first connection pads and the second connection pads and surrounding the first connection pads.
Electrical devices with electrodes on softening polymers and methods of manufacturing thereof
Flexible electrical devices comprising electrode layers on softening polymers and methods of manufacturing such devices, including lift-off processes for forming electrodes on softening polymers, processes for forming devices with a patterned double softening polymer layer, and solder reflow processes for forming electrical contacts on softening polymers.
Method of processing wiring substrate
A method of the invention is a method of processing a wiring substrate that includes a configuration in which conductors locally disposed on a substrate are coated with resin having inorganic members that form a filler and are dispersed in an organic member, the method including: removing the organic member from a surface layer side of the resin by use of an ashing method; and removing, by use of a wet cleaning method, the inorganic members remaining the surface layer side of the resin from which the organic member is removed.
Printed wiring board and method for manufacturing printed wiring board
A printed wiring board includes resin insulating layers including an outermost resin insulating layer, conductor layers laminated on the resin insulating layers, a copper layer formed in the outermost insulating layer, and metal bumps formed on the copper layer such that the bumps have upper surfaces protruding from the outermost insulating layer and that each metal bump includes Ni film, Pd film and Au film. The copper layer is reduced in diameter toward upper surface side such that the copper layer has upper and bottom surfaces and each upper surface has diameter that is smaller than diameter of each bottom surface, the outermost insulating layer has cylindrical sidewalls formed such that at least part of the copper layer is not in contact with the sidewalls, and the bumps are formed such that the Ni film is filling spaces between the copper layer and the sidewalls of the outermost insulating layer.
METHOD OF PRODUCING PRINTED CIRCUIT BOARDS AND PRINTED CIRCUIT BOARDS PRODUCED IN ACCORDANCE WITH THE METHOD
A method of producing a multilayer printed circuit board includes a metallic conductor structure including providing a base substrate including a film or plate and having first and second substrate sides, which base substrate at least partly consists of an electrically non-conductive organic polymer material and wherein the first substrate side is covered with a cover metal layer, partially removing the cover metal layer while subdividing the first substrate side into at least one first partial area, in which the first substrate side is free of the cover metal layer, and into at least one second partial area, in which the first substrate side is covered with the cover metal layer, and causing a plasma to act on the first substrate side with the aid of which plasma the polymer material is removed in the at least one first partial area while forming at least one trench.
Component carrier with embedded component exposed by blind hole
The present invention relates to an embedded printed circuit board including: an insulation substrate including a cavity; a sensor device disposed on the cavity; an insulating layer disposed on the insulation substrate, having an opening part exposing the sensor device; and a pad part disposed on the lower surface of the opening part exposing the sensor device.
Circuit board and method for manufacturing the same
A method for manufacturing a circuit board embeds a portion of an outer circuit layer in an outer dielectric layer which increases contact area between the outer circuit layer and the outer dielectric layer, improving adhesion between the outer circuit layer and the outer dielectric layer, and reducing a thickness of the outer circuit substrate, thereby reducing the overall thickness of the finished circuit board.
PRODUCING METHOD OF WIRED CIRCUIT BOARD
Provided is a method for producing a wired circuit board in which a first preparation step of preparing a first substrate having an insulating layer and a conductive layer disposed on one surface of the insulating layer; a second preparation step of preparing a second substrate having a metal layer; a bonding step of laminating the first substrate and the second substrate so that the conductive layer and the metal layer are in contact with each other, and metal-bonding the conductive layer and the metal layer; and a patterning step of forming a conductive pattern on the other surface of the insulating layer are carried out.
Flexible circuit electrode array and method of manufacturing the same
A method for manufacturing a flexible circuit electrode array, comprising: a) depositing a metal trace layer containing a base coating layer, a conducting layer and a top coating layer on the insulator polymer base layer; b) applying a layer of photoresist on the metal trace layer and patterning the metal trace layer and forming metal traces on the insulator polymer base layer; c) activating the insulator polymer base layer and depositing a top insulator polymer layer and forming one single insulating polymer layer with the base insulator polymer layer; d) applying a thin metal layer and a layer of photoresist on the surface of the insulator polymer layer and selective etching the insulator layer and the top coating layer to obtain at least one via; and e) filling the via with electrode material. A layer of polymer is laid down. A layer of metal is applied to the polymer and patterned to create electrodes and leads for those electrodes. A second layer of polymer is applied over the metal layer and patterned to leave openings for the electrodes, or openings are created later by means such as laser ablation. Hence the array and its supply cable are formed of a single body. Alternatively, multiple alternating layers of metal and polymer may be applied to obtain more metal traces within a given width. The method provides an excellent adhesion between the polymer base layer and the polymer top layer and insulation of the trace metals and electrodes.