This tin or tin alloy electroplating solution according to one aspect contains a soluble salt (A) including at least a stannous salt, one or more compounds (B) selected from the group consisting of an organic acid, an inorganic acid, and a salt thereof, a surfactant (C) that is a polyoxyethylene polycyclic phenyl ether sulfuric acid ester salt represented by the following General Formula (1), and a leveling agent (D).

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In General Formula (1), m is an integer of 1 to 3, n is an integer of 10 to 30, and X is a cation.

The present invention relates to a method for manufacturing composite solder balls that are metallized on the surface and calibrated, these balls comprising a core consisting of a spherical support particle of diameter Do made of expanded polystyrene and having an intergranular porosity of at least 50%, and a shell covering said support particle and formed by a plurality of metallic surface layers. The present invention also relates to balls that can be obtained by the method according to the invention, as well as to the use thereof for the assembly of electronic boards.

Embodiments of the present invention provide a method (1000) of assembling an electrical circuit comprising one or more copper electrical conductors, the method comprising plating (1010) a surface of the one or more conductors with a layer comprising tin; annealing the plating; applying (1020) solder to at least a portion of the one or more electrical conductors, wherein said solder comprises tin and copper; and annealing the electrical circuit.

A method of attaching a chip to the substrate with an outer layer comprising via pillars embedded in a dielectric such as solder mask, with ends of the via pillars flush with said dielectric, the method comprising the steps of: (o) optionally removing organic varnish, (p) positioning a chip having legs terminated with solder bumps in contact with exposed ends of the via pillars, and (q) applying heat to melt the solder bumps and to wet the ends of the vias with solder.

A method for manufacturing a printed wiring board includes forming a conductor layer including first and second pads on an insulating layer, forming a dry film resist layer on the insulating and conductor layers, forming first and second openings exposing the first and second pads, applying first metal plating to form first and second base plating layers on the first and second pads, applying second metal plating to form a first top plating layer of a first post and portion of a second top plating layer of a second bump post, applying the second metal plating further to form second portion of the second top layer of the second post, removing the dry film resist layer, forming a solder resist layer to cover the first and second posts, and thinning the solder resist layer over entire surface to position the first and second top layers outside the solder resist layer.

A structure is formed which is prepared as a via for electrical contact passing through layers of an optical waveguide, in a multilayer structure including an electrical substrate and the laminated layers of the optical waveguide. The surface of an electrode pad is plated with solder. The layers of the optical waveguide are formed above the portion plated with solder are removed to expose the portion plated with solder. A device is prepared having both a light-emitter or photoreceptor in optical contact with the optical waveguide, and a stud (pillar). The stud (pillar) is inserted into the portion in which layers of the optical waveguide have been removed, and the plated solder is melted to bond the electrode pad on top of the electrical substrate to the tip of the inserted stud (pillar).

The present invention comprises: a base film on which a first element mounting part and a second element mounting part are defined; wiring patterns formed by extending from each of the first element mounting part and the second element mounting part on the base film, wherein the wiring patterns include a first terminal part in the first element mounting part and a second terminal part in the second element mounting part; and a first plating layer formed on the second terminal part, wherein the first plating layer includes a pure metal plating layer, and the first plating layer is not formed on the first terminal part.

A manufacturing method of transformer circuit board includes following steps: plate stamping, forming a plurality of metal plates with a stamping mold; primary layering, layering the metal plates that are in alignment with each other between two outer insulation layers, with an inner insulation layer disposed between the two metal plates; primary pressing, hot pressing the metal plates to fix the metal plates between the two outer insulation layers; secondary layering, layering another metal plate on the outer side of the two outer insulation layers, respectively, corresponding to the positions of the previously layered metal plates; secondary pressing, hot pressing the metal plates on the outer side of the outer insulation layers, and printing to form a solder mask layer on the outer insulation layers. Finally, cutting to form a transformer circuit board with low leakage inductance and high EMI shield.

A printed wiring board includes a base insulating layer, a conductor layer formed on the base layer and including conductor pads, an underlayer formed on one of the conductor pads and including a metal different from a metal of the conductor layer, a solder resist layer formed on the base layer such that the solder resist layer is covering the conductor layer and has openings exposing the conductor pads, and a bump formed directly on a first conductor pad of the conductor pads and including a base plating layer formed in a first opening of the openings and a top plating layer formed on the base plating layer such that a metal of the base plating layer is same as the metal of the conductor layer. The conductor pads include a second conductor pad such that the second conductor pad is the one of the conductor pads having the underlayer.

A printed wiring board includes a base insulating layer, a conductor layer formed on the base layer and including conductor pads, an underlayer formed on one of the conductor pads and including a metal different from a metal of the conductor layer, a solder resist layer formed on the base layer such that the solder resist layer is covering the conductor layer and has openings exposing the conductor pads, and a bump formed directly on a first conductor pad of the conductor pads and including a base plating layer formed in a first opening of the openings and a top plating layer formed on the base plating layer such that a metal of the base plating layer is same as the metal of the conductor layer. The conductor pads include a second conductor pad such that the second conductor pad is the one of the conductor pads having the underlayer.