A composition for use as an electronic material. The composition contains at least one organic semiconducting material, and at least one electrically insulating polymer forming a semiconducting blend wherein the insulating polymer acts as a matrix for the organic semiconducting material resulting in an interpenetrating morphology of the polymer and the semiconductor material. The variation of charge carrier mobility with temperature in the semiconducting blend is less than 20 percent in a temperature range. A method of making a film of an electronic material. The method includes dissolving at least one organic semiconducting material and at least one insulating polymer into an organic solvent in a pre-determined ratio resulting in a semiconducting blend, depositing the blend onto a substrate to form a film comprising an interpenetrating morphology of the at least one insulating polymer and the at least one organic semiconductor material.

An organic n-dopant for doping organic electron transport materials. The n-dopant comprising at least one proazaphosphatrane compound having a triple N-substituted phosphorus atom of the formula

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Objects of the present invention are to provide an organic semiconductor element in which carrier mobility is high, variation of mobility is suppressed, and temporal stability under high temperature and high humidity is excellent, and a manufacturing method thereof, to provide a novel compound suitable for an organic semiconductor, and to provide an organic semiconductor film in which mobility is high, variation of mobility is suppressed, and temporal stability under high temperature and high humidity is excellent, a manufacturing method thereof, and an organic semiconductor composition that can suitably form the organic semiconductor film.

The organic semiconductor element according to the present invention is an organic semiconductor layer containing a compound having a constitutional repeating unit represented by Formula 1 and having a molecular weight of 2,000 or greater.

D-A  (1)

Provided is a method of manufacturing an electronic apparatus which includes preparing a substrate having a first Young's modulus, disposing a thin film having a second Young's modulus greater than the first Young's modulus on the substrate, disposing an electronic device on the thin film, and disposing a capping layer configured to cover the electronic device on the thin film.

A field-effect transistor comprises, on a substrate, a source electrode, a drain electrode, and a gate electrode; a semiconductor layer in contact with the source electrode and the drain electrode; wires individually electrically connected to the source electrode and the drain electrode; and a gate insulating layer that insulates the semiconductor layer from the gate electrode, wherein a connecting portion between the source electrode and the wire forms a continuous phase, and a connecting portion between the drain electrode and the wire forms a continuous phase, the portions constituting the continuous phases contain at least an electrically conductive component and an organic component, and integrated values of optical reflectance at a region of a wavelength of 600 nm or more and 900 nm or less on the wires are higher than integrated values of optical reflectance at a region of a wavelength of 600 nm or more and 900 nm or less on the source electrode and the drain electrode.

A transistor structure is presented comprising: an organic semiconductor channel region, and source and drain electrodes in electrical contact with said organic semiconductor channel region, wherein at least one of said source and drain electrodes is formed by spaced apart regions of a first metallic material separated by regions of a second metallic material such that regions of the first and second metallic materials are in contact with the organic semiconductor channel region, said first metallic material being selected as having work function substantially similar to HOMO energy level of said organic semiconductor channel region and said second metallic material being selected as having work function substantially similar to LUMO energy level of said organic semiconductor channel region, thereby enabling selective injections of electrons or holes into said channel region.

Methods of forming films of aligned carbon nanotubes on a substrate surface are provided. The films are deposited from carbon nanotubes that have been concentrated and confined at a two-dimensional liquid/liquid interface. The liquid/liquid interface is formed by a dispersion of organic material-coated carbon nanotubes that flows over the surface of an immiscible liquid within a flow channel. Within the interface, the carbon nanotubes self-organize via liquid crystal phenomena and globally align along the liquid flow direction. By translating the interface across the substrate, large-area, wafer-scale films of aligned carbon nanotubes can be deposited on the surface of the substrate in a continuous and scalable process.

A method of p-type doping a carbon nanotube includes the following steps: providing a single carbon nanotube; providing a layered structure, wherein the layered structure is a tungsten diselenide film or a black phosphorus film; and p-type doping at least one portion of the carbon nanotube by covering the carbon nanotube with the layered structure.

Described are concepts, systems, circuits, devices, structures and methods for depositing carbon nanotubes (CNTs) uniformly over a substrate. The described concepts, systems, circuits, devices, structures and methods meet at least several requirements; namely, the systems, circuits, devices, structures are: (1) manufacturable; (2) silicon-CMOS compatible; and (3) provide a path for realizing energy efficiency benefits utilizing silicon. In embodiments, described is an illustrative CNT solution-based deposition technique that addresses all of these requirements. Also described is a method for providing carbon nanotube field effect transistors (CNFETs) using uniform and reproducible fabrication techniques suitable for use across industry-standard wafers and which may use the same equipment currently being used to fabricate silicon product wafers. Also described are CNFETs fabricated within commercial silicon manufacturing facilities and having wafer-scale uniformity and reproducibility across multiple wafers.

An object of the present invention is to provide an ink composition for manufacturing an organic semiconductor device, the ink composition allowing an organic semiconductor material with a rigid main chain into an ink having an optimal solute concentration for a single-crystal formation process. The present invention provides an ink composition for manufacturing an organic semiconductor device, the ink composition including at least one solvent selected from Naphthalene Compound (A) and at least one solute. The isomer content of Naphthalene Compound (A) is preferably 2% or less in terms of a percentage for peak area with Naphthalene Compound (A) being 100% in gas chromatography. Naphthalene Compound (A): a compound represented by Formula (a), where in Formula (a), R is as defined in the description.