Patent classifications
H10K10/478
MODULAR ELECTRONICS APPARATUSES AND METHODS
An apparatus comprising: a module; a substrate; and electrolyte between the module and the substrate, wherein an electronic component is formed between the module and the substrate and wherein the electrolyte is configured to function as the electrolyte in the electronic component and also as the adhesive to attach the module to the substrate.
Enhanced perovskite materials for photovoltaic devices
A perovskite material that has a perovskite crystal lattice having a formula of C.sub.xM.sub.yX.sub.z, where x, y, and z, are real numbers, and 1,4-diammonium butane cation cations disposed within or at a surface of the perovskite crystal lattice. C comprises one or more cations selected from the group consisting of Group 1 metals, Group 2 metals, ammonium, formamidinium, guanidinium, and ethene tetramine. M comprises one or more metals each selected from the group consisting of Be, Mg, Ca, Sr, Ba, Fe, Cd, Co, Ni, Cu, Ag, Au, Hg, Sn, Ge, Ga, Pb, In, Tl, Sb, Bi, Ti, Zn, Cd, Hg, and Zr and combinations thereof. X comprises one or more anions each selected from the group consisting of halides, sulfides, selenides, and combinations thereof.
Enhanced Perovskite Materials for Photovoltaic Devices
A perovskite material that has a perovskite crystal lattice having a formula of C.sub.xM.sub.yX.sub.z, and alkyl polyammonium cations disposed within or at a surface of the perovskite crystal lattice; wherein x, y, and z, are real numbers; C comprises one or more cations selected from the group consisting of Group 1 metals, Group 2 metals, ammonium, formamidinium, guanidinium, and ethene tetramine; M comprises one or more metals each selected from the group consisting of Be, Mg, Ca, Sr, Ba, Fe, Cd, Co, Ni, Cu, Ag, Au, Hg, Sn, Ge, Ga, Pb, In, Tl, Sb, Bi, Ti, Zn, Cd, Hg, and Zr, and combinations thereof and X comprises one or more anions each selected from the group consisting of halides, pseudohalides, chalcogenides, and combinations thereof.
Patterning method for preparing top-gate, bottom-contact organic field effect transistors
The present invention relates to a process for the preparation of a top-gate, bottom-contact organic field effect transistor on a substrate, which organic field effect transistor comprises source and drain electrodes, a semiconducting layer, a cured first dielectric layer and a gate electrode, and which process comprises the steps of: i) applying a composition comprising an organic semiconducting material to form the semiconducting layer, ii) applying a composition comprising a first dielectric material and a crosslinking agent carrying at least two azide groups to form a first dielectric layer, iii) curing portions of the first dielectric layer by light treatment, iv) removing the uncured portions of the first dielectric layer, and v) removing the portions of the semiconducting layer that are not covered by the cured first dielectric layer, wherein the first dielectric material comprises a star-shaped polymer consisting of at least one polymer block A and at least two polymer blocks B, wherein each polymer block B is attached to the polymer block A, and wherein at least 60 mol % of the repeat units of polymer block B are selected from the group consisting of Formulas (1A), (1B), (1C), (1D), (1E) and (1F), wherein R.sup.1, R.sup.2, R.sup.3, R.sup.4, R.sup.5, R.sup.6, R.sup.7 and R.sup.8 are independently and at each occurrence H or C.sub.1-C.sub.10-alkyl. ##STR00001##
Field effect-transistor, method for manufacturing same, wireless communication device using same, and product tag
A field-effect transistor including at least: a substrate; a source electrode; a drain electrode; a gate electrode; a semiconductor layer in contact with the source electrode and with the drain electrode; and a gate insulating layer insulating between the semiconductor layer and the gate electrode, wherein the semiconductor layer contains a carbon nanotube, and the gate insulating layer contains a polymer having inorganic particles bound thereto. Provided is a field-effect transistor and a method for producing the field-effect transistor, wherein the field-effect transistor causes decreased leak current and furthermore enables a semiconductor solution to be uniformly applied.
MEMORY DEVICE COMPRISING BIOCOMPATIBLE POLYMER NANOPARTICLES, AND MANUFACTURING METHOD THEREFOR
The present invention relates to a memory device comprising biocompatible polymer nanoparticles, and a manufacturing method therefor. The present invention can provide a memory device which can be more efficiently integrated in the organic semiconductor field when applied to a biocompatible electronic device, and can have excellent capacitance by being treated with a silane coupling agent. In addition, the method for manufacturing the memory device, according to the present invention, uses a solution process, and thus a memory device can be manufactured with a very simple method.
THIN FILM STRUCTURE INCLUDING DIELECTRIC MATERIAL LAYER AND ELECTRONIC DEVICE EMPLOYING THE SAME
Disclosed are a thin film structure and an electronic device including the same. The disclosed thin film structure includes a dielectric material layer between a first material layer and a second material layer. The dielectric material layer includes a dopant in a matrix material having a fluorite structure. The dielectric material layer is uniformly doped with a low concentration of the dopant, and has ferroelectricity.
DISPLAY APPARATUS AND MANUFACTURING METHOD OF THE SAME
A display apparatus includes a plurality of pixels each including a substrate on which are disposed: an interlayer insulating layer; a driving thin film transistor in which a driving semiconductor layer and a driving gate electrode are each disposed between the substrate and the first interlayer insulating layer; a first capacitor in which a first electrode, a first dielectric pattern and a second electrode are sequentially stacked, the first electrode being connected to the driving gate electrode; and a plurality of contact plugs extended through a thickness of the interlayer insulating layer, with which the driving thin film transistor and the first capacitor are respectively connected to electrodes outside thereof. Lateral surfaces of the first dielectric pattern are covered by the interlayer insulating layer, and the first dielectric pattern within the first capacitor is disposed spaced apart from each of the contact plugs.
ANALOG AMPLIFIER
An object of the present invention is to apply an organic thin-film transistor, which is produced using an organic semiconductor material, to an analog amplifier. The analog amplifier according to the present invention includes: a first amplifier (2) which voltage-amplifies an analog signal to be amplified; and a second amplifier (6) which power-amplifies the thus amplified signal output from the first amplifier to generate a drive signal that drives an equipment (10). The first amplifier includes an organic semiconductor amplifier element, namely an organic thin-film field-effect transistor (4), in which a semiconductor layer forming a channel is composed of an organic semiconductor. An organic semiconductor material is solvent-soluble and thus can be applied to form a film by a printing method such as an ink-jet method. Therefore, the production thereof can be carried out using a simple production facility.
THIN FILM STRUCTURE INCLUDING DIELECTRIC MATERIAL LAYER AND ELECTRONIC DEVICE EMPLOYING THE SAME
Disclosed are a thin film structure and an electronic device including the same. The disclosed thin film structure includes a dielectric material layer between a first material layer and a second material layer. The dielectric material layer includes a dopant in a matrix material having a fluorite structure. The dielectric material layer is uniformly doped with a low concentration of the dopant, and has ferroelectricity.