An electrical device comprising a reconfigurable integrated circuit that includes paired top electrodes and bottom electrodes separated from each other by an active layer.

An improved switching material for forming a composite article over a substrate is disclosed. A first volume of nanotubes is combined with a second volume of nanoscopic particles in a predefined ration relative to the first volume of nanotubes to form a mixture. This mixture can then be deposited over a substrate as a relatively thick composite article via a spin coating process. The composite article may possess improved switching properties over that of a nanotube-only switching article. A method for forming substantially uniform nanoscopic particles of carbon, which contains one or more allotropes of carbon, is also disclosed.

An aspect of the invention relates to an elementary cell that includes a breakdown layer made of dielectric having a thickness that depends on a breakdown voltage, a device and a non-volatile resistive memory mounted in series, the device including an upper selector electrode, a lower selector electrode, a layer made in a first active material, referred to as active selector layer, the device being intended to form a volatile selector; the memory including an upper memory electrode, a lower memory electrode, a layer made in at least one second active material, referred to as active memory layer.

A semiconductor device includes a substrate, a plurality of word line structures disposed over the substrate to be spaced apart from each other in a first direction perpendicular to a surface of the substrate. Each of the plurality of word line structures extends in a second direction parallel to the surface of the substrate. In addition, the semiconductor device includes a switching layer disposed over the substrate to contact side surfaces of the plurality of word line structures, and bit line structures disposed over the substrate to extend in the first direction and to contact a surface of the switching layer. The switching layer is configured to perform a threshold switching operation, and has a variable programmable threshold voltage.

The disclosed subject matter relates generally to structures, memory devices and a method of forming the same. More particularly, the present disclosure relates to resistive random-access (ReRAM) memory devices with an electrode having tapered sides. The present disclosure provides a memory device including a first electrode having a tapered shape and including a tapered side, a top surface, and a bottom surface, in which the bottom surface has a larger surface area than the top surface, a resistive layer on and conforming to at least the tapered side of the first electrode, and a second electrode laterally adjacent to the tapered side of the first electrode, the second electrode including a top surface and a side surface abutting the resistive layer, in which the side surface forms an acute angle with the top surface.

Disclosed is a method of fabricating a resistive switching memory. A method of fabricating a resistive switching memory according to an embodiment of the present invention includes a step of forming a lower electrode on a substrate; a step of forming a resistive switching layer on the lower electrode using sputtering; and a step of forming an upper electrode on the resistive switching layer, wherein, in the step of forming a resistive switching layer on the lower electrode using sputtering, the substrate is disposed in a region, which is not reached by plasma generated by the first and second targets, between the first target and the second target disposed above the substrate to deposit the resistive switching layer.

Synaptic resistors (synstors), and their method of manufacture and integration into exemplary circuits are provided. Synstors are configured to emulate the analog signal processing, learning, and memory functions of synapses. Circuits incorporating synstors are capable of performing signal processing and learning concurrently in parallel analog mode with speed, energy efficiency, and functions superior to computers.

Disclosed is a synaptic device, a reservoir computing device using the synaptic device, and a reservoir computing method using the reservoir computing device. The synaptic device includes a substrate and a plurality of units cells on the substrate, wherein the unit cells each include a channel layer and a first electrode and second electrode intersecting the channel layer, wherein the first electrode and the second electrode are spaced apart from each other, and define a gap region exposing a portion of the channel layer, and the channel layer includes a 2-dimensional semiconductor material or a 2-dimensional ferroelectric material.

A resistive switching memory stack, comprised of a bottom electrode, an oxide layer located on the bottom electrode; and a top electrode located on the oxide layer. The top electrode is comprised of a first layer, an intermediate layer located directly on the first layer, and a top layer located on top of the intermediate layer. Wherein the intermediate layer is comprised of a doped carbide active layer.

A semiconductor device according to an embodiment of the present disclosure includes a substrate, a resistance change layer disposed on the substrate and including a plurality of carbon nanostructures, a channel layer disposed on the resistance change layer, a gate electrode layer disposed on the channel layer, and a source electrode layer and a drain electrode layer disposed to contact portions of the channel layer.