Electrical package including bimetal lid
10032727 ยท 2018-07-24
Assignee
Inventors
Cpc classification
H01L23/373
ELECTRICITY
H01L2224/73204
ELECTRICITY
H01L2224/0401
ELECTRICITY
H01L2924/1659
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2224/131
ELECTRICITY
H01L2224/73204
ELECTRICITY
H01L2224/16225
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2224/29191
ELECTRICITY
H01L2224/32225
ELECTRICITY
H01L2224/16225
ELECTRICITY
H01L23/42
ELECTRICITY
H01L23/49816
ELECTRICITY
H01L2224/131
ELECTRICITY
H01L23/3733
ELECTRICITY
H01L23/3185
ELECTRICITY
H01L2224/32225
ELECTRICITY
H01L2924/16251
ELECTRICITY
H01L2924/00
ELECTRICITY
H01L2224/29193
ELECTRICITY
H01L2924/16172
ELECTRICITY
H01L2224/2929
ELECTRICITY
H01L23/04
ELECTRICITY
H01L2224/16227
ELECTRICITY
H01L2224/92125
ELECTRICITY
H01L24/73
ELECTRICITY
H01L2924/00
ELECTRICITY
H01L23/3735
ELECTRICITY
International classification
H01L23/14
ELECTRICITY
H01L23/04
ELECTRICITY
H01L23/42
ELECTRICITY
H01L23/373
ELECTRICITY
Abstract
Electrical package including bimetal lid. The electrical package includes: an organic substrate; a semiconductor chip electrically connected to electrical pads on a surface of the organic substrate via a plurality of solder balls; and a lid for encapsulating the semiconductor chip on the organic substrate, wherein (i) an inner surface of a central part of the lid is connected to a surface of the semiconductor chip via a first TIM, (ii) an inner surface of an outer part of the lid is hermetically connected to the surface of the organic substrate, and (iii) the lid has a bimetal structure including at least two different metals. A circuit module is also provided.
Claims
1. An electrical package, comprising: an organic substrate; a semiconductor chip electrically connected to electrical pads on a surface of the organic substrate via a plurality of solder balls; and a three-layer lid for encapsulating the semiconductor chip on the organic substrate having a first Copper (Cu) metal layer, a second Copper (Cu) metal layer and a Copper alloy metal layer, wherein the Copper alloy metal is selected from a group consisting of: Chromium Copper (CuCr), Zirconium Copper (ZrCu), and a combination thereof; and wherein the Copper alloy metal layer is sandwiched by the first Copper metal layer and the second Copper metal layer; and a cooling module formed on the three-layer lid via a second TIM that is thicker than the first TIM; wherein: (i) an inner surface of a central part of the first Copper metal layer of the lid is connected to a surface of the semiconductor chip via a first thermal interface material (TIM), wherein the first TIM is not the first Copper metal layer, the Copper alloy metal layer or the second Copper metal layer; (ii) an inner surface of an outer part of the second Copper metal layer of the lid is hermetically connected to the surface of the organic substrate; and (iii) the first copper layer and the second copper layer are the same length and width and cover the same area.
2. The electrical package according to claim 1, wherein the cooling module comprises a heat sink.
3. The electrical package according to claim 1, wherein the first and the second TIM comprise silicon or polymer resin containing conductive fillers.
4. The electrical package according to claim 1, further comprising: an underfill formed between the semiconductor chip and the surface of the organic substrate.
5. The electrical package according to claim 1, wherein the inner surface of the outer part of the second metal layer of the three-layer lid is hermetically connected to the surface of the organic substrate using sealing materials.
6. The electrical package according to claim 1, wherein the organic substrate comprises a core layer sandwiched by two buildup layers.
7. The electrical package according to claim 6, wherein the core layer comprises organic materials and a plurality of conductive vias to electrically connect between the two buildup layers.
8. The electrical package according to claim 7, wherein the buildup layers comprise a plurality of wiring layers and dielectric layers.
Description
BRIEF DESCRIPTION OF THE DRAWING
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DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
(9) Through the more detailed description of some embodiments of the present invention in the accompanying drawings, the above and other objects, features and advantages of the present invention will become more apparent, wherein the same reference generally refers to the same components in the embodiments of the present invention.
(10) Referring to
(11) Inner surface 401 of the central part of lid 40 is connected to the surface of semiconductor chip 20 via TIM 50. TIM 50 can include: silicone grease, heat conduction sheet, or perpendicular orientation carbon nanotube (CNT). Inner surface 401 of the outer part of lid 40 is hermetically connected to the surface of organic substrate 10 using sealing materials 60. Sealing materials 60 can include thermosetting resin. Further, underfill 70 is formed between semiconductor chip 20 and the surface of organic substrate 10. Underfill 70 can include epoxy resin with fillers.
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(13) The semiconductor chip 20 may include a silicon chip or other semiconductor chip such as IC, LSI, VLSI, or MPU. The material of the semiconductor chip is not limited to specific types. Lid 40 of electronic package 100 has bimetal structure 401,402 (shown in
(14) Metal layers 401, 402 of lid 40 may be made of a combination of Copper (Cu) 401 and Cu alloy 402. Cu alloy 402 may include Chromium Copper (CuCr) or Zirconium Copper (ZrCu) because CuCr and ZrCu have high thermal conductivity as shown in Table 1 of
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(19) The embodiment of the present invention has been described with reference to the accompanying drawings. However, the present invention is not limited to the embodiment. The present invention can be carried out in forms to which various improvements, corrections, and modifications are added based on the knowledge of those skilled in the art without departing from the purpose of the present invention.