Patent classifications
H01G4/08
Metamaterial oxide capacitor
A capacitor may comprise a substrate and a first electrically conductive electrode layer. A metal oxide layer may be deposited on at least one of the substrate or the first electrically conductive electrode layer. A proximal region of the metal oxide may comprise a stoichiometric, dielectric, oxygen vacancy-free portion of the metal oxide. The proximal region may be in communication with the first electrically conductive electrode layer. A distal region of the metal oxide may comprise a constant oxygen vacancy portion. The distal region may be in communication with a second electrically conductive electrode layer. The metal oxide may comprise a gradient region comprising a substantially stoichiometric metal oxide portion and a substantially constant oxygen vacancy portion. The gradient region may comprise an increasing oxygen vacancy gradient from the proximal region to the distal region. The second electrically conductive electrode layer may be deposited on the distal region.
Capacitor and method for manufacturing the same
A capacitor is provided having a plurality of first conductive columnar portions that each have a nanosized outer diameter. Moreover, each of a plurality of second conductive columnar portions also have a nanosized outer diameter. A conductive portion is disposed on a first dielectric layer and faces at least a part of each of the plurality of first conductive columnar portions with the first dielectric layer interposed therebetween. The conductive portion is also disposed on a second dielectric layer and faces at least a part of each of the plurality of second conductive columnar portions with the second dielectric layer interposed therebetween. A tip of each of the second conductive columnar portions is located closer to a first support portion than a tip of each of the first conductive columnar portions.
Capacitor and method for manufacturing the same
A capacitor is provided having a plurality of first conductive columnar portions that each have a nanosized outer diameter. Moreover, each of a plurality of second conductive columnar portions also have a nanosized outer diameter. A conductive portion is disposed on a first dielectric layer and faces at least a part of each of the plurality of first conductive columnar portions with the first dielectric layer interposed therebetween. The conductive portion is also disposed on a second dielectric layer and faces at least a part of each of the plurality of second conductive columnar portions with the second dielectric layer interposed therebetween. A tip of each of the second conductive columnar portions is located closer to a first support portion than a tip of each of the first conductive columnar portions.
Dummy Metal-Insulator-Metal Structures Within Vias
Via array configurations for metal-insulator-metal (MIM) capacitor structures are disclosed herein. An exemplary MIM capacitor structure includes a capacitor bottom metal layer, a first dielectric layer over the capacitor bottom metal layer, a capacitor middle metal layer over the first dielectric layer, a second dielectric layer over the capacitor middle metal layer, and a capacitor top metal layer over the second dielectric layer. A metal via array, which has a first metal via and a second metal via, is connected to the capacitor top metal layer and the capacitor bottom metal layer. A portion of the capacitor top metal layer covers an area of the second dielectric layer extending from the first metal via to the second metal via. From a top view, the portion of the capacitor top metal layer surrounds the first metal via and the second metal via.
Dummy Metal-Insulator-Metal Structures Within Vias
Via array configurations for metal-insulator-metal (MIM) capacitor structures are disclosed herein. An exemplary MIM capacitor structure includes a capacitor bottom metal layer, a first dielectric layer over the capacitor bottom metal layer, a capacitor middle metal layer over the first dielectric layer, a second dielectric layer over the capacitor middle metal layer, and a capacitor top metal layer over the second dielectric layer. A metal via array, which has a first metal via and a second metal via, is connected to the capacitor top metal layer and the capacitor bottom metal layer. A portion of the capacitor top metal layer covers an area of the second dielectric layer extending from the first metal via to the second metal via. From a top view, the portion of the capacitor top metal layer surrounds the first metal via and the second metal via.
DEEP TRENCH CAPACITOR INCLUDING STRESS-RELIEF VOIDS AND METHODS OF FORMING THE SAME
A deep trench is formed in a substrate. A layer stack including at least three metallic electrode layers interlaced with at least two node dielectric layers is formed over the substrate. The layer stack continuously extends into the deep trench, and a cavity is present in an unfilled volume of the deep trench. A dielectric fill material layer including a dielectric fill material is formed in the cavity and over the substrate. The dielectric fill material layer encapsulates a void that is free of any solid phase and is formed within a volume of the cavity. The void may expand or shrink under stress during subsequently handling of a deep trench capacitor including the layer stack to absorb mechanical stress and to increase mechanical stability of the deep trench capacitor.
Relaxor-ferroelectric material and method of synthesizing the same and device including relaxor-ferroelectric material
A relaxor-ferroelectric material, a method of synthesizing the same and a device including the relaxor-ferroelectric material are provided. The relaxor-ferroelectric material includes a ferroelectric material having a first polarization characteristic. The ferroelectric material having the first polarization characteristics includes a plurality of regions having a second polarization characteristic and spaced apart from each other, and the first polarization characteristic and the second polarization characteristic are different from each other. The ferroelectric material having the first polarization characteristics and the plurality of regions have different response characteristics with respect to alternating current (AC) sweeping. The plurality of regions may include a solid solution.
Relaxor-ferroelectric material and method of synthesizing the same and device including relaxor-ferroelectric material
A relaxor-ferroelectric material, a method of synthesizing the same and a device including the relaxor-ferroelectric material are provided. The relaxor-ferroelectric material includes a ferroelectric material having a first polarization characteristic. The ferroelectric material having the first polarization characteristics includes a plurality of regions having a second polarization characteristic and spaced apart from each other, and the first polarization characteristic and the second polarization characteristic are different from each other. The ferroelectric material having the first polarization characteristics and the plurality of regions have different response characteristics with respect to alternating current (AC) sweeping. The plurality of regions may include a solid solution.
Multilayer electronic component
A multilayer electronic component includes a body including dielectric layers and internal electrodes alternately disposed in a first direction, and external electrodes disposed on the body to be connected to the internal electrodes. At least one internal electrode of the internal electrodes includes a plurality of disconnected portions penetrating through a respective internal electrode. A disconnected portion of the plurality of disconnected portions includes at least one of a pore or a dielectric substance disposed to connect adjacent dielectric layers to each other. A dielectric filling ratio, defined as a ratio of an overall length of the dielectric substance to an overall length of the disconnected portion on a cross section in the third and first directions, is more than 20% to 80% or less.
Multilayer electronic component
A multilayer electronic component includes a body including dielectric layers and internal electrodes alternately disposed in a first direction, and external electrodes disposed on the body to be connected to the internal electrodes. At least one internal electrode of the internal electrodes includes a plurality of disconnected portions penetrating through a respective internal electrode. A disconnected portion of the plurality of disconnected portions includes at least one of a pore or a dielectric substance disposed to connect adjacent dielectric layers to each other. A dielectric filling ratio, defined as a ratio of an overall length of the dielectric substance to an overall length of the disconnected portion on a cross section in the third and first directions, is more than 20% to 80% or less.