Patent classifications
H01G4/12
Ceramic electronic device
A ceramic electronic device includes an element body and an external electrode. The element body is formed by laminating a ceramic layer and an internal electrode layer. The external electrode is electrically connected to at least one end of the internal electrode layer. The external electrode includes a baked electrode layer. The baked electrode layer includes a first region and a second region. The first region is contacted with an end surface of the element body and located near a joint boundary with the element body. The second region is located outside the first region and constituting an outer surface of the baked electrode layer. The first region includes a first glass having a predetermined composition. The second region includes a second glass having a predetermined composition.
MULTILAYER CERAMIC CAPACITOR
A multilayer ceramic capacitor includes a laminate and
an external electrode connected to the internal electrode layer. The laminate includes a central layer portion in which an internal electrode layer and a dielectric ceramic layer are alternately laminated, and a covering portion covering an outer surface of the central layer portion in the lamination direction and the width direction. A region where the main surface meets the lateral surface in the laminate is defined as a corner portion that is rounded, and a distance from the corner portion to an internal electrode closest to the corner portion is about 20 .Math.m or less.
Low Inductance Component
A low inductance component may include a multilayer, monolithic device including a first active termination, a second active termination, at least one ground termination, and a pair of capacitors connected in series between the first active termination and the second active termination. The lead(s) may be coupled with the first active termination, second active termination, and/or the at least one ground termination. The lead(s) may have respective length(s) and maximum width(s). A ratio of the length(s) to the respective maximum width(s) of the lead(s) may be less than about 20.
Low Inductance Component
A low inductance component may include a multilayer, monolithic device including a first active termination, a second active termination, at least one ground termination, and a pair of capacitors connected in series between the first active termination and the second active termination. The lead(s) may be coupled with the first active termination, second active termination, and/or the at least one ground termination. The lead(s) may have respective length(s) and maximum width(s). A ratio of the length(s) to the respective maximum width(s) of the lead(s) may be less than about 20.
POLYVINYL ACETAL RESIN
The present invention provides a polyvinyl acetal resin which leaves less fine undissolved matter when dissolved in an organic solvent and thus can improve productivity particularly when used as a binder for a ceramic green sheet, and which can also provide a ceramic green sheet having excellent toughness and enables production of a highly reliable multilayer ceramic capacitor. Provided is a polyvinyl acetal resin having: a wavenumber A (cm.sup.−1) of a peak within a range of 3,100 to 3,700 cm.sup.−1 in an IR absorption spectrum measured using an infrared spectrophotometer; and a hydroxy group content (mol %), the wavenumber A of the peak and the hydroxy group content satisfying relations of the following formulas (1) and (2):
[(3,470−A)/Hydroxy group content]≤5.5 (1)
(3,470−A)≤185 (2)
wherein A is a wavenumber which is lower than 3,470 cm.sup.−1 and at which a transmittance a (%) satisfying [100−(100−X)/2] is exhibited, where X (%) is a minimum transmittance of the peak within the wavenumber range of 3,100 to 3,700 cm.sup.−1.
POLYVINYL ACETAL RESIN
The present invention provides a polyvinyl acetal resin which leaves less fine undissolved matter when dissolved in an organic solvent and thus can improve productivity particularly when used as a binder for a ceramic green sheet, and which can also provide a ceramic green sheet having excellent toughness and enables production of a highly reliable multilayer ceramic capacitor. Provided is a polyvinyl acetal resin having: a wavenumber A (cm.sup.−1) of a peak within a range of 3,100 to 3,700 cm.sup.−1 in an IR absorption spectrum measured using an infrared spectrophotometer; and a hydroxy group content (mol %), the wavenumber A of the peak and the hydroxy group content satisfying relations of the following formulas (1) and (2):
[(3,470−A)/Hydroxy group content]≤5.5 (1)
(3,470−A)≤185 (2)
wherein A is a wavenumber which is lower than 3,470 cm.sup.−1 and at which a transmittance a (%) satisfying [100−(100−X)/2] is exhibited, where X (%) is a minimum transmittance of the peak within the wavenumber range of 3,100 to 3,700 cm.sup.−1.
Multilayer ceramic capacitor and board having the same
A multilayer ceramic capacitor (MLCC) includes a body including first dielectric layers and second dielectric layers, the body including first to sixth surfaces, a second surface, a third surface, a fourth surface, a fifth surface and a sixth surface; first internal electrodes disposed on the first dielectric layers, exposed to the third surface, the fifth surface, and the sixth surface, and spaced apart from the fourth surface by first spaces; second internal electrodes disposed on the second dielectric layers to oppose the first internal electrodes with the first dielectric layers or the second dielectric layers interposed therebetween, exposed to the fourth surface, the fifth surface, and the sixth surface, and spaced apart from the third surface by second spaces; first dielectric patterns disposed in at least a portion of the first spaces, and second dielectric patterns disposed in at least a portion of the second spaces; and lateral insulating layers.
Multilayer ceramic capacitor and board having the same
A multilayer ceramic capacitor (MLCC) includes a body including first dielectric layers and second dielectric layers, the body including first to sixth surfaces, a second surface, a third surface, a fourth surface, a fifth surface and a sixth surface; first internal electrodes disposed on the first dielectric layers, exposed to the third surface, the fifth surface, and the sixth surface, and spaced apart from the fourth surface by first spaces; second internal electrodes disposed on the second dielectric layers to oppose the first internal electrodes with the first dielectric layers or the second dielectric layers interposed therebetween, exposed to the fourth surface, the fifth surface, and the sixth surface, and spaced apart from the third surface by second spaces; first dielectric patterns disposed in at least a portion of the first spaces, and second dielectric patterns disposed in at least a portion of the second spaces; and lateral insulating layers.
Multi-layered ceramic electronic component and manufacturing method thereof
A multilayer ceramic electronic component includes a ceramic body including first and second internal electrodes disposed to face each other and a dielectric layer interposed therebetween. When an average thickness of the dielectric layer is denoted as ‘td,’ an average thickness of the first and second internal electrodes is denoted as ‘te,’ and a standard deviation of thicknesses of an internal electrode, measured at a plurality of points in a predetermined region of the internal electrode, is denoted as ‘σte,’ a ratio of the standard deviation of thicknesses of the internal electrode to the average thickness of the dielectric layer, which is denoted as ‘σte/td,’ satisfies 0.12≤σte/td≤0.21.
Integrated circuit devices and methods of manufacturing the same
An integrated circuit device includes a capacitor structure, wherein the capacitor structure includes: a bottom electrode over a substrate; a supporter on a sidewall of the bottom electrode; a dielectric layer on the bottom electrode and the supporter; and a top electrode on the dielectric layer and covering the bottom electrode. The bottom electrode comprises: a base electrode layer over the substrate and extending in a first direction that is perpendicular to a top surface of the substrate, and a conductive capping layer including niobium nitride that is between a sidewall of the base electrode layer and the dielectric layer, and also between a top surface of the base electrode layer and the dielectric layer.