A display device includes a substrate, a first active layer including a driving active pattern of a driving transistor disposed on the substrate and a first active pattern of a first transistor disposed on the substrate, a second active layer including a driving sub-active pattern disposed on the driving active pattern of the first active layer, a first insulating film disposed on the first active layer and the second active layer, a driving gate electrode disposed on the first insulating film and overlapping the driving sub-active pattern, and a first gate electrode disposed on the first insulating film and overlapping the first active pattern, where a thickness of the driving active pattern is greater than a thickness of the driving sub-active pattern.

A display apparatus includes a substrate including a display area and a peripheral area outside the display area, a pixel circuit disposed on the substrate in the display area, where the pixel circuit includes a driving thin film transistor and a switching thin film transistor, and a display element connected to the pixel circuit. The driving thin film transistor includes a driving semiconductor layer having a single layer structure, the switching thin film transistor includes a switching semiconductor layer in which a first layer, a second layer, and a third layer, which are oxide semiconductors, are sequentially stacked one on another, and a conductivity of the second layer of the switching semiconductor layer is greater than respective conductivities of the first layer and the third layer of the switching semiconductor layer.

A thin film transistor substrate, a display device, a method of manufacturing a thin film transistor substrate, and a method of manufacturing a display device, the thin film transistor substrate including a substrate; a first thin film transistor on the substrate, the first thin film transistor including a first active pattern, and a first gate electrode arranged to overlap at least a part of the first active pattern; and a second thin film transistor on the substrate, the second thin film transistor including a second active pattern that includes a plurality of protrusions on an upper surface thereof, and a second gate electrode arranged to overlap at least a part of the second active pattern.

Embodiments herein include thin-film transistors (TFTs) including channel layer stacks with layers having differing mobilities. The TFTs disclosed herein transport higher total current through both the low mobility and the high mobility channel layers due to higher carrier density in high mobility channel layer and/or the high mobility channel layers, which increases the speed of response of the TFTs. The TFTs further include a gate structure disposed over the channel layer stack. The gate structure includes one or more gate electrodes, and thus the TFTs are top-gate (TG), double-gate (DG), or bottom-gate (BG) TFTs. The channel layer stack includes a plurality of layers with differing mobilities. The layers with differing mobilities confer various benefits to the TFT. The high mobility layer increases the speed of response of the TFT.

An active matrix substrate includes a first TFT and a second TFT, each of TFTs includes an oxide semiconductor layer and a gate electrode arranged on a part of the oxide semiconductor layer with a gate insulating layer therebetween, in which in the first TFT, the oxide semiconductor layer, in a first region covered with the gate electrode with the gate insulating layer interposed between the oxide semiconductor layer and the gate electrode, has a layered structure including a lower oxide semiconductor film and an upper oxide semiconductor film throughout and a mobility of the upper oxide semiconductor film is higher than a mobility of the lower oxide semiconductor film, and in the second TFT, in at least a part of a first region of the oxide semiconductor layer, of the lower oxide semiconductor film and the upper oxide semiconductor film, one oxide semiconductor film is provided, and another oxide semiconductor film is not provided.

A display apparatus including a first thin film transistor including a first active layer, and a second thin film transistor disposed on the first thin film transistor and including a second active layer, in which a material of the first active layer is different from a material of the second active layer, and a channel area of the second active layer overlaps a channel area of the first active layer.

A semiconductor device comprising an oxide semiconductor film, a gate electrode, a first insulating film, a source electrode, a drain electrode, and a second insulating film is provided. Each of a top surface of the gate electrode, a top surface of the source electrode, and a top surface of the drain electrode comprises a region in contact with the second insulating film. A top surface of the first insulating film comprises a region in contact with the gate electrode and a region in contact with the second insulating film and overlapping with the oxide semiconductor film in a cross-sectional view of the oxide semiconductor film. The oxide semiconductor film comprises a region in contact with the first insulating film and a region in contact with the second insulating film and adjacent to the region in contact with the first insulating film in the cross-sectional view.

This disclosure provides an array substrate, a method for preparing the array substrate, and a display panel. The method includes: forming a first thin film transistor and a second thin film transistor on a base substrate. In the formation of an active layer of the first thin film transistor, by using an eutectic point of the catalyst particle and silicon, and a driving factor that the Gibbs free energy of amorphous silicon is greater than that of crystalline silicon (silicon-based nanowire), and due to absorption of the amorphous silicon by the molten catalyst particle to form a supersaturated silicon eutectoid, the silicon nucleates and grows into a silicon-based nanowire. Moreover, during the growth of the silicon-based nanowire, the amorphous silicon film grows linearly along guide structure under the action of the catalyst particle, thus obtaining a silicon-based nanowire with a high density and high uniformity. In addition, by controlling the size of the catalyst particle and the thickness of the amorphous silicon film, the width of the silicon-based nanowire may also be controlled. In this way, a thin film transistor having a silicon-based nanowire with a uniform and controllable size is prepared.

Disclosed are an array substrate and a display panel. The array substrate includes: a base substrate; a first thin film transistor on the base substrate; where the first thin film transistor includes: a first gate electrode, a first active layer, a first source electrode, and a first drain electrode; where the first active layer includes: at least one guide structure extending in a first direction; a silicon-based nanowire, disposed on a side of the guide structure facing away from the base substrate; and an extending direction of the silicon-based nanowire is same as an extending direction of the guide structure.

Semiconductor-on-insulator (SOI) field effect transistors (FETs) including body regions having different thicknesses may be formed on an SOI substrate by selectively thinning a region of a top semiconductor layer while preventing thinning of an additional region of the top semiconductor layer. An oxidation process or an etch process may be used to thin the region of the top semiconductor layer, and a patterned oxidation barrier mask or an etch mask may be used to prevent oxidation or etching of the additional portion of the top semiconductor layer. Shallow trench isolation structures may be formed prior to, or after, the selective thinning processing steps. FETs having different depletion region configurations may be formed using the multiple thicknesses of the patterned portions of the top semiconductor layer. For example, partially depleted SOT FETs and fully depleted SOI FETs may be provided.