A dielectric body includes a plurality of crystal grains of which a main component is barium titanate, and an additive including Zr, Eu and Mn. At least one of the plurality of crystal grains has a core-shell structure having a core and a shell. A Zr/Ti atomic concentration ratio is 0.02 or more and 0.10 or less. An Eu/Ti atomic concentration ratio is 0.001 or more and 0.03 or less. A Mn/Ti atomic concentration ratio is 0.005 or more and 0.05 or less. A total atomic concentration of the one or more rare elements is smaller than an atomic concentration of Eu when the dielectric body has the one or more rare earth elements. A median diameter of the plurality of crystal grains is 200 nm or more and 400 nm or less.

A multilayer ceramic electronic component includes a multilayer body including layered ceramic layers and having a rectangular parallelepiped shape, and first and second outer electrodes covering both end surfaces of the multilayer body and extending from both the end surfaces so as to cover at least portions of a first main surface, a second main surface, a first side surface, and a second side surface of the multilayer body. An insulating layer is provided on a surface of the first main surface of the multilayer body. The first outer electrode and the second outer electrode disposed on the first main surface side are disposed on the insulating layer.

A multilayer ceramic electronic component includes a multilayer body including stacked ceramic layers, internal conductive layers stacked on the ceramic layers, and external electrodes each connected to the internal conductive layers. The internal conductive layers each include holes each having different shapes and area equivalent diameters. When an area equivalent diameter in which a cumulative value in a cumulative distribution of area equivalent diameters of the holes existing in each of the internal conductive layers is about 90% is defined as an area equivalent diameter D90, an average value of circularity of the holes in a first population including holes each having the area equivalent diameter D90 or more is about 0.7 or less.

A multilayer ceramic electronic component includes a multilayer body including stacked ceramic layers, internal conductive layers stacked on the ceramic layers, and external electrodes each connected to the internal conductive layers. The internal conductive layers each include holes each having a different area equivalent diameter. The holes include first holes including ceramic pillars therein and second holes not including ceramic pillars therein. The ceramic pillars connect ceramic layers on sides of the internal conductive layers. When an area equivalent diameter in which a cumulative value in a cumulative distribution of area equivalent diameters of the holes existing in each of the internal conductive layers is 90% is defined as an area equivalent diameter D90, an abundance ratio of the first holes in a first population including holes each having the area equivalent diameter D90 or more is about 14% or more.

A ceramic electronic device includes: a multilayer chip having a multilayer structure and a cover layer, the multilayer structure having a structure in which each of dielectric layers and each of internal electrode layers are alternately stacked, respective one ends of the plurality of internal electrode layers being alternately exposed to a first end face and a second end face of the multilayer structure, the cover layer being provided on each of an upper face and a lower face of the multilayer structure in a stacking direction of the multilayer structure, a main component of the cover layer being ceramic, wherein in each of two side faces of the multiplayer structure, a color of a first region is different from a color of a second region that is positioned at a height different from the first region in the stacking direction.

Provided is a dielectric ceramic composition including a first component and a second component, wherein the first component comprises an oxide of Ca of 0.00 mol % to 35.85 mol % an oxide of Sr of 0.00 mol % to 47.12 mol %, an oxide of Ba of 0.00 mol % to 51.22 mol %, an oxide of Ti of 0.00 mol % to 17.36 mol %, an oxide of Zr of 0.00 mol % to 17.36 mol %, an oxide of Sn of 0.00 mol % to 2.60 mol %, an oxide of Nb of 0.00 mol % to 35.32 mol %, an oxide of Ta of 0.00 mol % to 35.32 mol %, and an oxide of V of 0.00 mol % to 2.65 mol %, and the second component includes at least (a) an oxide of Mn of 0.005% by mass to 3.500% by mass and (b) an oxide of Cu and/or an oxide of Ru.

A multi-layer ceramic capacitor includes: a first region including a polycrystal including, as a main component, crystal grains free from intragranular pores; a second region that includes a polycrystal including, as a main component, crystal grains including intragranular pores and includes a higher content of silicon than a content of silicon in the first region; a capacitance forming unit including ceramic layers laminated along a first direction, and internal electrodes disposed between the ceramic layers; and a protective portion including a cover that covers the capacitance forming unit and constitutes a main surface facing in the first direction, a side margin constituting a side surface facing in a second direction orthogonal to the first direction, and a ridge constituting a connection portion, the connection portion connecting the main surface and the side surface to each other. The ceramic layers include the first region. The ridge includes the second region.

A complex device is provided. A complex device according to an embodiment of the present invention comprises: a suppressor including a pair of first dielectric sheet layers having a first dielectric constant and a pair of internal electrodes spaced apart from each other on one surface of one of the pair of first dielectric sheet layers; a capacitor including a plurality of second dielectric sheet layers having a second dielectric constant and a plurality of capacitor electrodes provided on each of the plurality of second dielectric sheet layers; and a pair of external terminals provided on both sides of the suppressor and the capacitor to be connected to the plurality of capacitor electrodes and the pair of internal electrodes. Here, provided is the complex device in which the first dielectric constant is greater than the second dielectric constant.

Each of a supporting-terminal-equipped capacitor chip and a mounted structure thereof includes a capacitor chip and first and second supporting terminals that each have electric conductivity. A maximum diameter size of the first supporting terminal when viewed in an axial direction is larger than a maximum length size of a portion of a first outer electrode on a second main surface in a length direction. A maximum diameter size of the second supporting terminal when viewed in the axial direction is larger than a maximum length size of a portion of a second outer electrode on the second main surface in the length direction.

A multilayer capacitor and a board having the multilayer capacitor mounted thereon are provided. The multilayer capacitor includes a capacitor body including a dielectric layer and first and second internal electrodes, and first and second external electrodes disposed on both ends of the capacitor body and connected to exposed portions of the first and second internal electrodes, respectively. A/B satisfies 0.0016≤A/B<1 in which A is a thickness of the dielectric layer and B is an average length of margins of the capacitor body in a length direction, and A is 1 μm or less.