A multilayer electronic component having a plurality of laminated dielectric layers and inner electrode layers. The dielectric layers have a plurality of crystal grains including first regions where Re is dissolved in a solid state; and second regions where Re is not dissolved in the solid state. A median size of the crystal grains to an average thickness of the dielectric layers is 0.5≤t≤0.7. A ratio of a sum of cross sectional areas of the first regions to those of the plurality of crystal grains is 0.7≤s≤0.9. When a total amount of Ti, Zr, and Hf is 100 molar parts in the dielectric layers, a sum of the Zr and the Hf is 0≤a≤1.0; an amount b of Si is 0.1≤b≤1.0; an amount c of Re is 0.5≤c≤10.0; and a ratio m of a total of Ba and Re to a total of Ti, Zr, and Hf is 0.990≤m≤1.050.

A multilayer ceramic capacitor includes a multilayer structure having a substantially rectangular parallelepiped shape and including dielectric layers and internal electrode layers that are alternately stacked, the dielectric layers being mainly composed of BaTiO.sub.3, the internal electrode layers being alternately exposed to two edge faces of the multilayer chip opposite to each other. A Zr/Ti ratio is 0.02 or more and 0.10 or less in a capacity section. A Ba/Ti ratio is more than 0.900 and less than 1.010 in the capacity section. A Eu/Ti ratio is 0.005 or more and 0.05 or less in the capacity section. A Mn/Ti ratio is 0.0005 or more and 0.05 or less in the capacity section. A total amount of a rare earth element or rare earth elements is less than the amount of Eu.

A multilayer ceramic capacitor includes a multilayer body including layered ceramic layers and internal electrode layers, and an external electrode on a side surface of the multilayer body and connected to the internal electrode layers. A recess is provided in a surface of the external electrode on one side of opposing main surfaces of the multilayer ceramic capacitor.

A multi-layer ceramic capacitor includes: a ceramic body including ceramic layers laminated along one axial direction, first and second internal electrodes alternately disposed between the ceramic layers, first and second end surfaces to which the first and second internal electrodes are respectively drawn, a first end margin that forms an interval between the first end surface and the second internal electrodes, and a second end margin that forms an interval between the second end surface and the first internal electrodes; and first and second external electrodes that respectively cover the first and second end surfaces and are respectively connected to the first and second internal electrodes, the multi-layer ceramic capacitor satisfying the following relationship: S.sub.E≥S/400+300, where S (μm) represents an area of the ceramic body and S.sub.E (μm) represents a total area of the first and second internal electrodes in cross sections of the first and second end margins.

A multilayer capacitor includes a body having a plurality of dielectric layers and first and second internal electrodes alternately disposed with the dielectric layers interposed therebetween, and further including an active region in which the first and second internal electrodes overlap each other, and upper and lower covers disposed above and below the active region, respectively; and first and second external electrodes disposed on the body to be connected to the first and second internal electrodes, respectively, wherein the upper and lower covers include barium titanate (BT, BaTiO.sub.3) and Yttria-stabilized zirconia (YSZ).

A multi-layer ceramic electronic component, including: a capacitance forming unit that includes internal electrodes and ceramic layers, the internal electrodes being laminated in a first direction via the ceramic layers; and a circumferential unit that is provided on a circumference of the capacitance forming unit and formed of insulating ceramics. The circumferential unit includes a cover that is provided to the capacitance forming unit outward in the first direction, a side margin that is provided to the capacitance forming unit outward in a second direction orthogonal to the first direction, and a grain growth region that is formed at a boundary between the cover and the side margin and includes crystal grains of the insulating ceramics, the crystal grains having a mean grain size larger than a mean grain size of the crystal grains at a center portion of the cover.

Disclosed are a dielectric ceramic includes a plurality of crystal grain bulks including a ceramic, and a grain boundary between the plurality of crystal grain bulks, wherein a dopant is segregated in the grain boundary.

An electronic component is provided, and the electronic component includes: a capacitor array in which a plurality of multilayer capacitors are stacked, the plurality of multilayer capacitors including a body, and first and second external electrodes; first and second metal frames including first and second support portions bonded to the first and second external electrodes of the capacitor array, first and second mounting portions located below the first and second external electrodes and having first and second protrusions protruding downwardly, and first and second connection portions connecting the first and second support portions to the first and second mounting portions, respectively; and a capsule portion encapsulating the capacitor array to expose the first mounting portion of the first metal frame and the second mounting portion of the second metal frame, and having a lower surface provided with a plurality of protruding portions are formed at predetermined intervals.

A semiconductor device includes a first electrode; a second electrode which is apart from the first electrode; and a dielectric layer between the first electrode and the second electrode. The dielectric layer may include a base material including an oxide of a base metal, the base material having a dielectric constant of about 20 to about 70, and co-dopants including a Group 3 element and a Group 5 element. The Group 3 element may include Sc, Y, B, Al, Ga, In, and/or Tl, and the Group 5 element may include V, Nb, Ta, N, P, As, Sb, and/or Bi.

A multi-layer ceramic electronic component includes a ceramic body including a multi-layer unit, a side margin, and ridges. The multi-layer unit includes a capacitance forming unit including ceramic layers laminated in a first direction and internal electrodes disposed between the ceramic layers, a cover that covers the capacitance forming unit in the first direction, and a side surface facing in a second direction orthogonal to the first direction. The side margin covers the side surface. The ridges are rounded and extend in a third direction orthogonal to the first and second directions. The capacitance forming unit includes a first region disposed at a center portion in the first direction, and a second region disposed between the cover and the first region, end portions of the internal electrodes in the second direction in the second region being positioned inward in the second direction relative to those in the first region.