A display device including: a substrate; a first thin film transistor of polysilicon semiconductor, a second thin film transistor of oxide semiconductor; a first light shading film opposing to the polysilicon semiconductor, and a second light shading film opposing to the oxide semiconductor; a first insulating film, a second insulating film which is constituted from plural insulating films, and a third insulating film superposed in this order; a first through hole penetrating the second insulating film and not penetrating the first insulating film and the third insulating film; a second through hole penetrating the first insulating film and the third insulating film; the first light shading film connects with a first conductive component, a part of the first conductive component exists on the third insulating film, through the second through hole.

There is provided a display device including: a light emitting element; and a drive transistor (DRTr) that includes a coupling section (W1) and a plurality of channel sections (CH) coupled in series through the coupling section (W1), wherein the drive transistor (DRTr) is configured to supply a drive current to the light emitting element.

Disclosed herein is an apparatus that includes a semiconductor substrate having source/drain regions and a gate trench located between the source/drain regions; and a gate electrode embedded in the gate trench via a gate insulating film. The gate electrode includes a first polycrystalline silicon film located at a bottom of the gate trench and a metal film stacked on the first polycrystalline silicon film. The first polycrystalline silicon film is doped with boron.

Provided are a display substrate and a preparation method thereof, and a display apparatus. The display substrate includes a substrate, an active structure layer disposed on the substrate, a first source-drain structure layer disposed on a side of the active structure layer away from the substrate, and a second source-drain structure layer disposed on a side of the first source-drain structure layer away from the substrate. The active structure layer includes a first active layer and a second active layer. The first source-drain structure layer includes a first active via and a first source-drain electrode, and the first source-drain electrode is connected to the first active layer through the first active via; and the second source-drain structure layer includes a second active via and a second source-drain electrode, and the second source-drain electrode is connected to the second active layer through the second active via.

A 3D semiconductor device including: a first single crystal layer including a plurality of first transistors and a first metal layer, where a second metal layer is disposed atop the first metal layer; a plurality of logic gates including the first metal layer and first transistors; a plurality of second transistors disposed atop the second metal layer; a plurality of third transistors disposed atop the second transistors; a top metal layer disposed atop the third transistors; and a memory array including word-lines, where the memory array includes at least four memory mini arrays, where each of the mini arrays includes at least two rows by two columns of memory cells, where each memory cell includes one of the second transistors or one of the third transistors, and where one of the second transistors is self-aligned to one of the third transistors, being processed following a same lithography step.

A display device is disclosed, which includes: a first substrate; an oxide semiconductor layer disposed on the first substrate; a silicon semiconductor layer disposed on the first substrate; and a capacitor including a first conductive component and a second conductive component, wherein the first conductive component is electrically connected to the oxide semiconductor layer and the second conductive component is electrically connected to the silicon semiconductor layer.

Provided is a thin film transistor including a highly-textured dielectric layer, an active layer, a gate electrode and a source/drain electrode that are stacked on a base substrate. The source/drain electrode includes a source electrode and a drain electrode. The gate electrode and the active layer are insulated from each other. The source electrode and the drain electrode are electrically connected to the active layer. Constituent particles of the active layer are of monocrystalline silicon-like structures. According to the present disclosure, the highly-textured dielectric layer is adopted to replace an original buffer layer to induce the active layer to grow into a monocrystalline silicon-like structure, such that the performance of the thin film transistor is improved.

Methods and systems for crystallizing a thin film provide a laser beam spot that is continually advanced across tire thin film to create a sustained complete or partial molten zone that is translated across the thin film, and crystallizes to form uniform, small-grained crystalline structures or grains.

A 3D semiconductor device, the device including: a first level including a first single crystal layer and first single crystal transistors; a first metal layer; a second metal layer disposed atop the first metal layer; second transistors disposed atop of the second metal layer; third transistors disposed atop of the second transistors, where at least one of the third transistors includes at least one replacement gate, being processed to replace a non-metal gate material with a metal based gate, and where a distance from at least one of the third transistors to at least one of the first transistors is less than 2 microns.

An electronic apparatus according to a variety of embodiments of the present invention may comprise: a display panel comprising a display which comprises one or more first pixels, one or more second pixels, and one or more first wires connected to the one or more first pixels and second pixels, and one or more fingerprint sensors which are disposed between the one or more first pixels and one or more second pixels; and a wiring layer comprising one or more second wires connected to the one or more fingerprint sensors by wiring between the layers, A variety of other embodiments are possible.