Patent classifications
H01L2224/32258
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
The one end portion of the connector of the semiconductor device includes: a horizontal portion; a first inclined portion that is connected to the horizontal portion and is located closer to the tip end side of the one end than the horizontal portion, and the first inclined portion having a shape inclined downward from the horizontal portion; and a control bending portion that is connected to the first inclined portion and positioned at the tip of the one end portion, and the control bending portion bent downwardly along the bending axis direction. The lower surface of the control bending portion is in contact with an upper surface of the second terminal.
Wafer level flat no-lead semiconductor packages and methods of manufacture
Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.
PRINTING COMPONENTS OVER SUBSTRATE POST EDGES
A method of making a micro-module structure comprises providing a substrate, the substrate having a substrate surface and comprising a substrate post protruding from the substrate surface. A component is disposed on the substrate post, the component having a component top side and a component bottom side opposite the component top side, the component bottom side disposed on the substrate post. The component extends over at least one edge of the substrate post. One or more component electrodes are disposed on the component.
Method for Producing an Optoelectronic Component, and Optoelectronic Component
A method for producing an optoelectronic component and an optoelectronic component are disclosed. In an embodiment a method includes providing a carrier having a pedestal with a support surface, applying a liquid joining material with filler particles to the support surface of the pedestal and applying a radiation emitting semiconductor chip with a mounting surface, which is larger than the support surface of the pedestal to the liquid joining material such that the joining material forms a joining layer between the support surface of the pedestal and the mounting surface of the semiconductor chip and the joining material at least partially fills only a recess, which is limited by a part of the mounting surface projecting beyond the support surface.
Methods of manufacturing encapsulated semiconductor device package with heatsink opening
Embodiments include packaged semiconductor devices and methods of manufacturing packaged semiconductor devices. A semiconductor die includes a conductive feature coupled to a bottom surface of the die. The conductive feature only partially covers the bottom die surface to define a conductor-less region that spans a portion of the bottom die surface. The die is encapsulated by attaching the encapsulant material to the bottom die surface (e.g., including over the conductor-less region). The encapsulant material includes an opening that exposes the conductive feature. After encapsulating the die, a heatsink is positioned within the opening, and a surface of the heatsink is attached to the conductive feature. Because the heatsink is attached after encapsulating the die, the heatsink sidewalls are not directly bonded to the encapsulant material.
2-step die attach for reduced pedestal size of laminate component packages
A packaged semiconductor device includes a leadframe (LF) having a plurality of laminate-supporting pedestals. A cured first die attach (DA) material is on an outer edge of the pedestals being an ultraviolet (UV)-curing DA material having a photoinitiator or a cured B-stage DA material. A cured thermally-curing DA material is on an area of the pedestals not occupied by the UV-curing DA material. A laminate component having bond pads on a top side is mounted top side up on the plurality of pedestals.
Power semiconductor device
Provided is a power semiconductor device which is able to have improved connection reliability between a wiring line and an electrode of a power semiconductor element in comparison to conventional power semiconductor devices. This power semiconductor device is provided with: a semiconductor element; an insulating substrate having an electrode layer to which the semiconductor element is bonded; an external wiring line which is solder bonded to an upper surface electrode of the semiconductor element and has an end portion for external connection, said end portion being bent toward the upper surface; and a frame member which is affixed to the electrode layer of the insulating substrate. The frame member has a fitting portion that is fitted with the end portion for external connection; and the external wiring line has at least two projected portions that protrude toward the semiconductor element.
SEMICONDUCTOR DEVICE
A semiconductor device that is capable of suitably dissipating heat from a semiconductor chip is proposed. The proposed semiconductor device may include a semiconductor chip provided with a semiconductor substrate and a surface electrode provided on a surface of the semiconductor substrate; and a conductive plate provided with a plate shape portion and a convex portion protruding from the plate shape portion. An end surface of the convex portion may be corrected to the surface electrode. A width of the end surface of the convex portion may be narrower than a width of a base portion of the convex portion on a plate shape portion side.
Electronic module
An electronic module comprises a substrate 11, 21, an other-side electronic component 18, 23 provided on the other side of the substrate 11, 21, a one-side electronic component 13, 28 provided on one side of the substrate 11, 21 and a connecting terminal 115, 125 having an other-side extending part 119a, 129a extending to circumferential outside of the substrate 11, 21 on the other side of the substrate 11, 21, a one-side extending part 119b, 129b extending to circumferential outside of the substrate 11, 21 on one side of the substrate 11, 21, and a connecting part 118, 128 connecting the other-side extending part 119a, 129a with the one-side extending part 119b, 129b at the circumferential outside of the substrate 11, 21.
Method for Fabricating a Power Semiconductor Device
A method for fabricating a SiC power semiconductor device includes: providing a SiC power semiconductor die; depositing a metallization layer over the power semiconductor die, the metallization layer including a first metal; arranging the power semiconductor die over a die carrier such that the metallization layer faces the die carrier, the die carrier being at least partially covered by a plating that includes Ni; and diffusion soldering the power semiconductor die to the die carrier such that a first intermetallic compound is formed between the power semiconductor die and the plating, the first intermetallic compound including Ni.sub.3Sn.sub.4.