A semiconductor device includes a lead, semiconductor element, sealing resin and insulating substrate. The lead includes a die pad having first obverse and reverse surfaces opposite from each other in a thickness direction. The semiconductor element is fixed to the first obverse surface. The sealing resin covers the die pad and the semiconductor element. The insulating substrate includes a first metal layer, insulating layer and second metal layer stacked in this order. The insulating substrate includes second obverse and reverse surfaces respectively facing the same sides as the first obverse and reverse surfaces in the thickness direction. The first reverse surface and the second obverse surface are mutually fixed. The sealing resin includes an obverse surface and reverse surface respectively facing the same sides as the first obverse and reverse surfaces in the thickness direction. The second reverse surface is exposed from the reverse surface of the sealing resin.

A semiconductor device package may include a leadframe having a first portion with first extended portions and a second portion with second extended portions. Mold material may encapsulate a portion of the leadframe and a portion of a semiconductor die mounted to the leadframe. A first set of contacts of the semiconductor die may be connected to a first surface of the first extended portions, while a second set of contacts may be connected to a first surface of the second extended portions. A mold-locking cavity having the mold material included therein may be disposed in contact with a second surface of the first extended portions opposed to the first surface of the first extended portions, a second surface of the second extended portions opposed to the first surface of the second extended portions, the first portion of the leadframe, and the second portion of the leadframe.

A semiconductor module includes a semiconductor device having a gate runner extending in a first direction at an upper surface of the semiconductor device, and a metal wiring plate having a first bonding portion with a bonding surface to which the upper surface of the semiconductor device is bonded via a first bonding material. The first bonding portion has a plurality of first protrusions at the bonding surface. Each first protrusion protrudes toward the semiconductor device, and is provided in a position away from the gate runner by a first distance in a plan view of the semiconductor module.

Provided is a power semiconductor device which is able to have improved connection reliability between a wiring line and an electrode of a power semiconductor element in comparison to conventional power semiconductor devices. This power semiconductor device is provided with: a semiconductor element; an insulating substrate having an electrode layer to which the semiconductor element is bonded; an external wiring line which is solder bonded to an upper surface electrode of the semiconductor element and has an end portion for external connection, said end portion being bent toward the upper surface; and a frame member which is affixed to the electrode layer of the insulating substrate. The frame member has a fitting portion that is fitted with the end portion for external connection; and the external wiring line has at least two projected portions that protrude toward the semiconductor element.

Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.

The semiconductor device includes an insulating substrate including an insulating plate and a circuit plate; a semiconductor chip having a front surface formed with an electrode and a rear surface fixed to the circuit plate; a printed circuit board including a metal layer, and facing the insulating substrate; a conductive bonding material disposed on the electrode; and a conductive post having a leading end portion electrically and mechanically connected to the electrode through the bonding material, a base portion electrically and mechanically connected to the metal layer, and a central portion. In the conductive post, a wetting angle of a surface of the leading end portion with respect to the molten bonding material is less than the wetting angle of a surface of the central portion.

The present invention is directed to semiconductor devices and integrated circuit packaging. In a specific embodiment, a semiconductor device with a heat spreader structure is provided. The heat spreader is configured to couple to a second layer to establish an effective thermal dissipation path for heat generated from a hot spot of a circuit. The second layer comprises a first portion and a second portion. The first portion is coupled to the hot spot. The heat spreader comprises a third portion and a fourth portion. The third portion comprises a protrusion coupled to the first portion via a first side surface. There are other embodiments as well.

In one embodiment, methods for making semiconductor devices are disclosed.

A dual-side cooling (DSC) semiconductor package includes a first metal-insulator-metal (MIM) substrate having a first insulator layer, first metallic layer, and second metallic layer. A second MIM substrate includes a second insulator layer, third metallic layer, and fourth metallic layer. The third metallic layer includes a first portion having a first contact area and a second portion, electrically isolated from the first portion, having a second contact area. A semiconductor die is coupled with the second metallic layer and is directly coupled with the third metallic layer through one or more solders, sintered layers, electrically conductive tapes, solderable top metal (STM) layers, and/or under bump metal (UBM) layers. The first contact area is electrically coupled with a first electrical contact of the die and the second contact area is electrically coupled with a second electrical contact of the die. The first and fourth metallic layers are exposed through an encapsulant.

Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.