A display device includes a substrate, a plurality of pixels above the substrate, each of the pixels including a light emitting element, a display region including the plurality of pixels, a thin film transistor which each of the plurality of pixels includes, a protective film including a first inorganic insulating material and located between the thin film transistor and the light emitting element, a sealing film including a second inorganic insulating material and covering the light emitting element, and at least one through hole located in the display region and passing through the substrate, the protective film, and the sealing film, wherein the second inorganic insulating material is in direct contact with the protective film in a first region located between the through hole and the pixels.

A display panel measures a contact resistance of an adhesive portion to evaluate adhesion quality of an integrated circuit mounted thereon. The display panel includes a plurality of light-emitting elements, a first pad part including a plurality of first effective pads electrically connected to the light-emitting elements, and n (n being a natural number equal to or greater than 2) first measuring pads insulated from the light-emitting elements, a conductive adhesive film on the first pad part and including a plurality of conductive balls, an integrated circuit on the conductive adhesive film, and including an internal line electrically connected to the first measuring pads by the conductive balls, and a second pad part including a plurality of second effective pads electrically connected to the first effective pads, and 2n second measuring pads electrically connected to the first measuring pads.

A display device including a substrate having thin film transistors (TFT) comprising: the TFT including an oxide semiconductor film, a gate electrode and an insulating film formed between the oxide semiconductor film and the gate electrode, wherein a first aluminum oxide film and a second aluminum oxide film, which is formed on the first aluminum oxide film, are formed between the insulating film and the gate electrode, an oxygen concentration in the first aluminum oxide film is bigger than an oxygen concentration in the second aluminum oxide film.

A minute transistor is provided. A transistor having low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. An electrode including the transistor is provided. A novel electrode is provided. The electrode includes a first conductive layer containing a metal, an insulating layer, and a second conductive layer. The insulating layer is formed over the first conductive layer. A mask layer is formed over the insulating layer. The insulating layer is etched using plasma with the mask layer used as a mask, whereby an opening is formed in the insulating layer so as to reach the first conductive layer. Plasma treatment is performed on at least the opening in an oxygen atmosphere. By the plasma treatment, a metal-containing oxide is formed on the first conductive layer in the opening. The oxide is removed, and then the second conductive layer is formed in the opening.

In various embodiments, electronic devices such as touch-panel displays incorporate interconnects featuring a conductor layer and, disposed above the conductor layer, a capping layer comprising an alloy of Cu and one or more refractory metal elements selected from the group consisting of Ta, Nb, Mo, W, Zr, Hf, Re, Os, Ru, Rh, Ti, V, Cr, and Ni.

The present disclosure provides a thin film transistor, a manufacturing method of the thin film transistor and a display device, configured to improve electrical property of the thin film transistor. The thin film transistor includes: an active layer, including a source and drain contact region and a channel region; a metal barrier layer, covering the source and drain contact region; a first gate insulating layer, at least covering the channel region and exposing the metal barrier layer; a gate, on the first gate insulating layer and covering the channel region; an inner layer dielectric layer, on the gate and having a through hole exposing the metal barrier layer; and a source and drain, on the inner layer dielectric layer and in contact with the metal barrier layer through the through hole.

The present disclosure provides a method for manufacturing an array substrate, an array substrate, and a display device. The method for manufacturing the array substrate includes: forming a light-shielding layer and a buffer layer in sequence on a base substrate; forming an active layer on the buffer layer, and forming a first via hole in the active layer; forming an interlayer dielectric layer on the active layer; forming a second via hole in the interlayer dielectric layer at a position corresponding to the first via hole and a third via hole in the buffer layer at a position corresponding to the first via hole by a single patterning process; forming a source/drain electrode layer on the interlayer dielectric layer, in which the source/drain electrode layer is electrically connected to the light-shielding layer through the second via hole, the first via hole and the third via hole in sequence.

A semiconductor device includes a substrate, a semiconductor layer positioned above the substrate, and a blocking structure positioned between the substrate and the semiconductor layer. A dimension of the blocking structure is greater than a dimension of the semiconductor layer. The blocking structure may suppress diffusion of impurities from layers below the blocking structure.

A display device includes a substrate, a plurality of pixels above the substrate, each of the pixels including a light emitting element, a display region including the plurality of pixels, a thin film transistor which each of the plurality of pixels includes, a protective film including a first inorganic insulating material and located between the thin film transistor and the light emitting element, a sealing film including a second inorganic insulating material and covering the light emitting element, and at least one through hole located in the display region and passing through the substrate, the protective film, and the sealing film, wherein the second inorganic insulating material is in direct contact with the protective film in a first region located between the through hole and the pixels.

A display device includes an array substrate, a second substrate and a black matrix. The array substrate includes a first substrate, at least one electrostatic protecting component and a shielding layer. The first substrate has a display region and a peripheral region located outside the display region. The electrostatic protecting component is disposed on the first substrate in the peripheral region, and the electrostatic protecting component includes a semiconductor layer. The shielding layer includes an insulating material, and the shielding layer is disposed on the first substrate in the peripheral region, wherein the shielding layer overlaps the semiconductor layer. The second substrate is opposite to the first substrate. The black matrix is disposed between the second substrate and the first substrate. The shielding layer is disposed between the black matrix and the first substrate.