A manufacturing method of a TFT array substrate is provided, comprising: depositing and forming a gate and a gate scanning line; depositing sequentially a gate insulating layer, an active layer and a second metal layer; depositing and forming a first photoresist layer and a second photoresist layer on the second metal layer; first photoresist layer comprising a first-stage photoresist layer, second-stage photoresist layer and third-stage photoresist layer with increasing thickness, the first-stage photoresist layer being in the middle of the first photoresist layer and a channel being formed; ashing to remove first-stage photoresist layer, forming a source and a drain by etching; and ashing to remove the second-stage photoresist layer, and then depositing a passivation layer as a whole; stripping third-stage photoresist layer and second photoresist layer, depositing and forming a pixel electrode and a common electrode.

It is an object of the present invention to connect a wiring, an electrode, or the like formed with two incompatible films (an ITO film and an aluminum film) without increasing the cross-sectional area of the wiring and to achieve lower power consumption even when the screen size becomes larger. The present invention provides a two-layer structure including an upper layer and a lower layer having a larger width than the upper layer. A first conductive layer is formed with Ti or Mo, and a second conductive layer is formed with aluminum (pure aluminum) having low electric resistance over the first conductive layer. A part of the lower layer projected from the end section of the upper layer is bonded with ITO.

A thin film transistor includes: a bottom gate electrode; a bottom gate electrode insulating layer, a semiconducting active layer and a first insulating layer which are disposed on the bottom gate electrode in sequence; a source electrode and a drain electrode which are disposed at a side of the first insulating layer away from the bottom gate electrode; vias disposed in the first insulating layer at positions which correspond to the source electrode and the drain electrode respectively; and ohmic contact layers disposed on and covering the semiconducting active layer at positions corresponding to the vias respectively. Each of the source electrode and the drain electrode is in contact with a corresponding one of the ohmic contact layers through a corresponding one of the vias.

The present disclosure provides an array substrate and a method for manufacturing an array substrate. The array substrate includes a substrate, a switch assembly disposed on the substrate and correspondingly disposed beside the switch assembly, a color photoresist layer formed on the switch assembly and the photosensor, and a pixel electrode formed on the color photoresist layers and coupled with the switch assembly. The switch assembly includes a first metal layer. The photosensor includes a first electrode layer formed directly on the substrate and a first amorphous silicon layer disposed above the first electrode layer. The first electrode layer and the first metal layer are disposed on a same layer.

The manufacturing method for TFT array substrate of the invention exposes the negative photoresist material on the passivation layer with a semi-transmissive mask to form a crosslinked portion, first and second uncrosslinked portion; then, performs the first development to remove the first uncrosslinked portion and forms a via on the passivation layer, performs the ashing treatment for thinning the negative photoresist material to expose the second uncrosslinked portion, performs the second development to remove the second uncrosslinked portion; deposits transparent conductive material on negative photoresist material and exposed passivation layer to form a pixel electrode on passivation layer, and finally removes the remaining negative photoresist material and the transparent conductive material twith photoresist stripping solution. The invention, using step-wise development, solves the technical difficulty of forming a halftone structure with a negative photoresist material, and enables feasibility of the use of the negative photoresist material in the 3mask process.

This application provides a method for manufacturing an array substrate, an array substrate, and a display panel. A gate metal layer, a gate insulating layer, and a semiconductor active layer are formed by using one photomask process, a first passivation layer is formed in one photomask process, and a source metal layer, a drain metal layer, and a pixel electrode layer are formed on the first passivation layer.

The present application discloses a thin film transistor having an active layer including a channel part, a source contact part, and a drain contact part. At least one of the source contact part and the drain contact part has a contacting edge having one or more irregularities along the contacting edge.

A semiconductor device includes a substrate, a semiconductor layer positioned above the substrate, and a blocking structure positioned between the substrate and the semiconductor layer. A dimension of the blocking structure is greater than a dimension of the semiconductor layer. The blocking structure may suppress diffusion of impurities from layers below the blocking structure.

A body layer formed of a semiconductor layer, the body layer comprising, a first region, a second region, and a channel region positioned therebetween; a channel stopper formed on the channel region; source and drain electrodes electrically connected to the first and second regions via first and second contact layers respectively are provided. Each of the first and second contact layers comprises an impurities-containing first amorphous silicon layer; a thickness of each of the first and second regions is less than a thickness of the channel region; and the first and second regions comprise a second amorphous silicon layer containing impurities in a concentration being less than a concentration of impurities contained in the first amorphous silicon layer. This makes it possible to suppress a photoexcited current and improve the aperture ratio in a case that a display apparatus is configured.

A display device includes a substrate, a plurality of pixels above the substrate, each of the pixels including a light emitting element, a display region including the plurality of pixels, a thin film transistor which each of the plurality of pixels includes, a protective film including a first inorganic insulating material and located between the thin film transistor and the light emitting element, a sealing film including a second inorganic insulating material and covering the light emitting element, and at least one through hole located in the display region and passing through the substrate, the protective film, and the sealing film, wherein the second inorganic insulating material is in direct contact with the protective film in a first region located between the through hole and the pixels.