A display device including a gate line, first and second data lines adjacent to each other in a first direction and crossing the gate line, a first transistor electrically connected to the gate line and the first data line, and a first pixel electrode electrically connected to the first transistor, in which the first pixel electrode includes a first sub-electrode and a second sub-electrode adjacent to each other in the first direction, the first sub-electrode includes a first longitudinal stem extending in a direction substantially parallel to the first data line and overlapping the first data line and a plurality of first branches connected to the first longitudinal stem, and the second sub-electrode includes a second longitudinal stem extending in a direction substantially parallel to the second data line and overlapping the second data line and a plurality of second branches connected to the second longitudinal stem.

The present disclosure provides a method for making a thin film transistor (TFT), a TFT, a back plate and a display device. The TFT includes: a gate electrode, a source, a drain, a dielectric layer and an active layer on the dielectric layer. The active layer includes at least one a-Si area and at least one p-Si area. This can reduce leakage current and reduce the technical complexity of the large-channel TFT.

A liquid crystal display device according to FFS technology is provided, which sufficiently provides a common electrode with common electric potential and improves an aperture ratio of pixels. A pixel electrode is formed of a first layer transparent electrode. A common electrode made of a second layer transparent electrode is formed above the pixel electrode interposing an insulation film between them. The common electrode in an upper layer is provided with a plurality of slits. The common electrode extends over all the pixels in a display region. An end of the common electrode is disposed on a periphery of the display region and connected with a peripheral common electric potential line that provides a common electric potential Vcom. There is provided neither an auxiliary common electrode line nor a pad electrode, both of which are provided in a liquid crystal display device according to a conventional art.

The present application discloses a display panel and a display device apparatus. The display panel includes a substrate, the substrate includes a plurality of pixel regions; an active switch, a plurality of active switches disposed on the substrate, wherein the pixel regions are disposed on the active switches, the active switches are corresponding to each of the pixel regions, respectively, and each of the active switch includes: an insulating layer, the insulating layer includes at least two thin film layers, the thin film layers are formed by chemical vapor deposition process with a predetermined thickness.

The present application discloses a photodiode structure including multiple light trapping elements. Each light trapping element includes an N-type silicon layer with a recessed structure therein, an intrinsic silicon layer disposed overlying the N-type silicon layer including a side region and a bottom region inside the recessed structure, and a P-type silicon layer disposed as an inner layer overlying the intrinsic silicon layer inside the recessed structure. A radial PIN junction is formed around a nominal axis of the recessed structure.

An exemplary embodiment of the present inventive concept provides a display device including: a light unit configured to emit blue light; a color conversion panel disposed on the light unit; and a display panel disposed between the light unit and the color conversion panel to include a transistor. The color conversion panel includes: a substrate; a color conversion layer disposed between the substrate and the display panel to include a semiconductor nanocrystal; a transmission layer disposed between the substrate and the display panel; and a polarization layer disposed between the color conversion layer and the display panel and between the transmission layer and the display panel, and the display panel includes a blue light blocking film which overlaps the transistor, while the blue light blocking film includes a red color filter.

Embodiments of the present disclosure provide an array substrate and a display device. The array substrate includes a plurality of gate lines and a plurality of data lines, the plurality of gate lines and the plurality of data lines crossing one another to bound pixel units and the pixel unites each including a pixel electrode and a thin film transistor, which includes a drain electrode, the array substrate further includes a common electrode line, the drain electrode includes an extension portion and the common electrode line and the extension portion form a light blocking structure together such that an orthographic projection of the light blocking structure on a plane where the pixel electrode is located is located near an edge of the pixel electrode. The array substrate provided by the present disclosure is applied to a display device.

A display panel, a manufacturing method thereof and a display device are provided. The display panel includes a substrate and a plurality of active switches disposed on the substrate. The active switch includes a gate layer disposed on a bottom portion. The gate layer is wound with an insulation medium layer, and the insulation medium layer includes a light-obstructing layer disposed on a side portion of the gate layer.

The present disclosure provides a method for manufacturing an active switch array substrate, and the active switch array substrate, the method includes: providing a substrate; coating a first metal layer on the substrate; forming a gate electrode by treating the first metal layer; depositing an amorphous silicon layer on the substrate and the gate electrode; coating a second metal layer on the amorphous silicon layer; forming a patterned second metal layer; coating a passivation layer on the patterned second metal layer; forming a through hole in the passivation layer; coating a light permeability conductive layer on the passivation layer; and carrying out a fourth photolithography process to the light permeability conductive layer, the passivation layer, and the patterned second metal layer, to form a channel, a source electrode, and a drain electrode on the light permeability conductive layer, the passivation layer, and the patterned second metal layer.

A thin-film transistor includes a gate electrode, a gate dielectric on the gate electrode, a first layer including a source region, a drain region, and a semiconductor region above and in direct contact with the gate dielectric and physically connecting the source and drain regions, and a second layer including an insulator material on the semiconductor region. The semiconductor region has less vertical thickness than the source and drain regions. In an embodiment, the thickness of the semiconductor region is no more than half that of the source and drain regions. In another embodiment, the second layer physically connects and electrically separates the source and drain regions. In yet another embodiment, a memory cell includes this transistor and a capacitor electrically connected to the drain region, the gate electrode being electrically connected to a wordline and the source region being electrically connected to a bitline.