A control device for controlling a switching converter includes a switch controller that generates a control signal with a switching period for controlling switching of a switch of the switching converter and setting a first interval in which a current flows in the switch, a second interval in which energy is transferred onto a storage element of the switching converter, and a third, wait, interval, at the end of the second interval. The duration of the first interval is determined based on a control voltage indicating the output voltage. A pre-distortion stage receives the control voltage and generates a pre-distorted control voltage as a function of the control voltage and a relationship between one of the first and third time intervals and the switching period, wherein the switch controller is configured to control a duration of the first interval based on the pre-distorted control voltage.

A control device for controlling a switching converter includes a switch controller that generates a control signal with a switching period for controlling switching of a switch of the switching converter and setting a first interval in which a current flows in the switch, a second interval in which energy is transferred onto a storage element of the switching converter, and a third, wait, interval, at the end of the second interval. The duration of the first interval is determined based on a control voltage indicating the output voltage. A pre-distortion stage receives the control voltage and generates a pre-distorted control voltage as a function of the control voltage and a relationship between one of the first and third time intervals and the switching period, wherein the switch controller is configured to control a duration of the first interval based on the pre-distorted control voltage.

A micro-electro-mechanical device, wherein a platform is formed in a top substrate and is configured to turn through a rotation angle. The platform has a slit and faces a cavity. A plurality of integrated photodetectors is formed in a bottom substrate so as to detect the light through the slit and generate signals correlated to the light through the slit. The area of the slit varies with the rotation angle of the platform and causes diffraction, more or less marked as a function of the angle. The difference between the signals of two photodetectors arranged at different positions with respect to the slit yields the angle.

Provided is a reference voltage circuit configured to supply a reference voltage in which a variation in voltage with respect to a variation in power supply voltage is suppressed. The reference voltage circuit includes a reference voltage generation circuit which includes an output line for supplying a generated reference voltage to an output terminal; and an output control circuit which includes an output transistor and a stabilization transistor, and is configured to control the supply of the reference voltage to the output terminal, the output transistor containing a gate to which a control voltage is to be provided, the stabilization transistor containing a gate to be connected to a source of the output transistor, and a source to be connected to a drain of the output transistor, and having a gate-source voltage that is equal to or more than a dram-source voltage in a saturation region of the output transistor.

Disclosed is a bandgap reference circuit, which includes a first current generator that generates a first current proportional to a temperature, a second current generator that outputs a second current obtained by mirroring the first current to a first node at which a reference voltage is formed, a first resistor that is connected with the first node and is supplied with the second current, and a first bipolar junction transistor (BJT) that includes an emitter node connected with the first resistor, a base node supplied with a first power, and a collector node supplied with a second power different from the first power.

A bias current generator circuit includes a current path and a leakage control circuit. The current path is connected between a supply voltage and a ground level. The current path includes a transistor and a resistor. The transistor has a current channel connected in the current path. The resistor has an upper terminal and a lower terminal connected in the current path, and a well contact to allow a reverse leakage current of the resistor to flow through. The leakage control circuit is connected to the supply voltage. The leakage control circuit includes a driving transistor to provide a driving voltage to the well contact of the resistor, and to allow the reverse leakage current of the resistor to flow into the leakage control circuit.

The present disclosure relates to a constant current source calibration circuit, a constant current source drive circuit, a drive chip, and an electronic device. The current calibration circuit includes a resistor and a calibration circuit connected to the resistor for adjusting a voltage drop across two ends of the resistor; and a selector or a switch connected to the two ends of the resistor, and configured to select one end of the resistor to be connected to a constant current source output channel and the corresponding other end to be supplied with a first bias voltage VD. Since the first bias voltage VD is a fixed constant, the voltage drop across the two ends of the resistor is adjusted.

In an embodiment an electronic device includes a first MOS-type transistor and a second MOS-type transistor connected as current mirrors, wherein the first transistor is diode connected and a first circuit configured to provide a first current equal to a first gate current of the first transistor multiplied by a size ratio of the first and second transistors.

In an embodiment an electronic device includes a first MOS-type transistor and a second MOS-type transistor connected as current mirrors, wherein the first transistor is diode connected and a first circuit configured to provide a first current equal to a first gate current of the first transistor multiplied by a size ratio of the first and second transistors.

A bandgap reference (BGR) circuit is provided. The BGR circuit includes a first node, a second node, and a third node. A first resistive element is connected between the second node and the third node. The BGR circuit is operative to provide a reference voltage as an output. The BGR circuit further includes a current shunt path connected between the first node and the third node, the current shunt path being operable to regulate a voltage drop across the first resistive element.