An integrated circuit device having insulated gate field effect transistors (IGFETs) having a plurality of horizontally disposed channels that can be vertically aligned above a substrate with each channel being surrounded by a gate structure has been disclosed. The integrated circuit device may include a temperature sensor circuit and core circuitry. The temperature senor circuit may include at least one portion formed in a region other than the region that the IGFETs are formed as well as at least another portion formed in the region that the IGFETs having a plurality of horizontally disposed channels that can be vertically aligned above a substrate with each channel being surrounded by a gate structure are formed. By forming a portion of the temperature sensor circuit in regions below the IGFETs, an older process technology may be used and device size may be decreased and cost may be reduced.

Methods and devices for speeding up the onset of a target current through an output leg of a current mirror are presented. Upon activation of the current mirror, a pre-charge current is sourced to a node of the current mirror that is common to the output leg and an input leg of the current mirror. Sourcing of the pre-charge current is based on sensing, by a first transistor, of a voltage at the common node. Pre-charging of the common node continues up to a cutoff voltage sensed at the common node. Sourcing of the pre-charge current is provided by a second transistor coupled to the common node. Based on the voltage sensed at the common node, the first transistor controls the sourcing of the pre-charge current by the second transistor. Such control is based on a portion of a current from a current source that flows through the first transistor.

The present disclosure provides an electronic circuit having one reference current terminal arranged to connect to a reference current generator, an MOS current mirror stage, an MOS push-pull amplifier stage operatively coupled to the current mirror stage and the current mode amplifier stage.

Various aspects relate to a startup circuit for a bandgap reference circuit, wherein a target voltage value is associated with the bandgap reference circuit, the target voltage value being indicative of a startup condition of the bandgap reference circuit that triggers a stable on-state of the bandgap reference circuit, wherein the startup circuit is configured to: provide a startup voltage at the bandgap reference circuit to trigger a start of an operation of the bandgap reference circuit; receive a feedback voltage, wherein the feedback voltage is representative of a startup condition of the bandgap reference circuit; and either increase the startup voltage at the bandgap reference circuit in the case that a voltage value of the feedback voltage is less than the target voltage value, or stop providing the startup voltage at the bandgap reference circuit in the case that the voltage value of the feedback voltage is equal to or greater than the target voltage value.

A memory device includes a voltage generator configured to generate a reference voltage for transmission to at least one component of the memory device. The voltage generator includes a first input to receive a first signal having a first voltage value. The voltage generator also includes a second input to receive a second signal having a second voltage value. The voltage generator further includes a first circuit configured to generate third voltage and a second circuit coupled to the first circuit to receive the third voltage value, wherein the second circuit receives the first signal and the second signal and is configured to utilize the third voltage value to facilitate comparison of the first voltage value and the second voltage value to generate an output voltage.

A reference current/voltage generator includes a current mirror unit and a current-mode temperature compensation unit. The current mirror unit generates a first current, a first sum current and a second sum current flowing through first to third terminals thereof, and the first current, the first sum current and the second sum current are in a multiple relationship. The current-mode temperature compensation unit is electrically connected to the second and third terminals of the current mirror unit, and when a voltage on the second terminal is equal to a voltage on the third terminal, the first sum current is a sum of a current proportional to absolute temperature (PTAT) and a current complementary to absolute temperature (CTAT). The first terminal of the current mirror unit is an output terminal of the reference current/voltage generator and configured to output the first current as a reference current.

An active common mode filter is configured to be positioned between a power supply and a switching converter-device/load for reducing common mode noise. The active common mode filter includes an active capacitor that has a sensing stage including one or more sensing capacitors, an amplifying stage including a common collector amplifier for mitigating an input voltage divider effect coupled to a common emitter amplifier for providing high gain, and an injection stage including one or more injection capacitors. Depending on the required attenuation in different applications, a multistage active common mode filter may be formed with a necessary number of stages, each stage including an active capacitor and an inductor.

A circuit is disclosed. The circuit includes a current detecting FET, configured to generate a current signal indicative of the value of the current flowing therethrough, an operational transconductance amplifier (OTA) configured to output a current in response to the voltage of the current signal, and a resistor configured to receive the current and to generate a voltage in response to the received current, where the generated voltage is indicative of the value of the current flowing through the current detecting FET. The current detecting FET is configured to become nonconductive in response to the generated voltage indicating that the current flowing through the current detecting FET is greater than a threshold.

A circuit is disclosed. The circuit includes a current detecting FET, configured to generate a current signal indicative of the value of the current flowing therethrough, an operational transconductance amplifier (OTA) configured to output a current in response to the voltage of the current signal, and a resistor configured to receive the current and to generate a voltage in response to the received current, where the generated voltage is indicative of the value of the current flowing through the current detecting FET. The current detecting FET is configured to become nonconductive in response to the generated voltage indicating that the current flowing through the current detecting FET is greater than a threshold.

An electronic device includes a current comparator to generate an output current based upon a difference between a current flowing in an output branch and a current flowing in an input branch. A pair of transistors is coupled to an output of the current comparator. A first amplifier has inputs coupled to the pair of transistors and to a reference voltage, the first amplifier being configured to subtract the reference voltage from a voltage across the pair of transistors and output a difference voltage. A second amplifier has inputs coupled to the difference voltage and to the reference voltage, the second amplifier being configured to subtract the difference voltage from the reference voltage and output a pulse skipping mode reference signal.