Provided is a method of SiC wafer processing, and the method includes the following steps. A SiC wafer is provided, and the SiC wafer has a first surface and an opposing second surface. A fine grinding process is performed on the first surface and the second surface of the SiC wafer. A dry etching process is performed on the first surface and the second surface of the SiC wafer to make the roughness of the first surface and the second surface 2.5 nm or less. After the dry etching process, a polishing process is performed on the first surface and the second surface of the SiC wafer.

A method of manufacturing a gallium nitride substrate includes preparation of a gallium nitride wafer, formation of a transformation layer, and formation of the gallium nitride substrate. The gallium nitride has a first main surface and a second main surface on a side opposite from the first main surface. The gallium nitride wafer is made of a hexagonal crystal, and each of the first main surface and the second main surface is a {1-100} m-plane of the hexagonal crystal. The transformation layer is formed along a planar direction of the gallium nitride wafer by emitting a laser beam into the gallium nitride wafer. The gallium nitride substrate is formed from the gallium nitride wafer by dividing the gallium nitride wafer at the transformation layer. In the formation of the transformation layer, the laser beam is emitted to form an irradiation mark for forming the transformation layer.

A manufacturing method of a chip package includes patterning a wafer to form a scribe trench, in which a light-transmissive function layer below the wafer is in the scribe trench, the light-transmissive function layer is between the wafer and a carrier, and a first included angle is formed between an outer wall surface and a surface of the wafer facing the light-transmissive function layer; cutting the light-transmissive function layer and the carrier along the scribe trench to form a chip package that includes a chip, the light-transmissive function layer, and the carrier; and patterning the chip to form an opening, in which the light-transmissive function layer is in the opening, a second included angle is formed between an inner wall surface of the chip and a surface of the chip facing the light-transmissive function layer, and is different from the first included angle.

Provided are a method of polishing a silicon wafer and a method of producing a silicon wafer which can reduce the formation of step-forming microdefects on a silicon wafer. The method includes: a double-side polishing step of performing polishing on front and back surfaces of a silicon wafer; a notch portion polishing step of performing polishing on a beveled portion of a notch portion of the silicon wafer after the double-side polishing step; a peripheral beveled portion polishing step of performing polishing on the beveled portion on the periphery of the silicon wafer other than the beveled portion of the notch portion after the notch portion polishing step; and a finish polishing step of performing finish polishing on the front surface of the silicon wafer after the peripheral beveled portion polishing step. The notch portion polishing step is performed in a state where the front surface is wet with water.

A polishing pad includes a textured polishing layer comprising a working surface and a second surface opposite the working surface. The textured polishing layer comprises a polymeric blend comprising thermoplastic urethane in an amount of between 40 and 95 wt. %, and styrenic copolymer in an amount of between 5 and 60 wt. %, based on the total weight of the textured polishing layer.

Disclosed are an automatic abrasion compensation system of a lower plate and a wafer lapping apparatus having the same. The automatic abrasion compensation system reduces wafer misloading and errors in wafer loading inspection occurring when the distance between the lower plate and a transfer robot is gradually increased due to abrasion of the lower plate during a lapping process. The automatic abrasion compensation system includes an ultrasonic sensor provided on the transfer robot, a jig located directly under the ultrasonic sensor and mounted on the lower plate, a controller configured to acquire measurement distance information by measuring a distance from the jig through the ultrasonic sensor, to compare the measurement distance information with set reference distance information and to generate an adjustment control signal, and a driver configured to automatically adjust a Z-axis position of the transfer robot depending on the adjustment control signal transmitted by the controller.

A method of manufacturing a semiconductor device includes performing one or more grinding processes on a backside surface of a device wafer to thin the device wafer from a first thickness to a second thickness. A first chemical mechanical polish (CMP) process is performed on the backside surface of the device wafer to thin the device wafer from the second thickness to a third thickness. A second CMP process is performed on the backside surface of the device wafer to selectively remove device wafer material that is disposed over an active device area of the semiconductor device, where a removal rate of the device wafer material is a function of depth.

Provided is a surface protectant that suppresses corrosion of a semiconductor wafer surface by a basic compound, and reduces defects in the semiconductor wafer. The semiconductor wafer surface protectant of the present invention includes a compound represented by Formula (1) below;
R.sup.1O—(C.sub.3H.sub.6O.sub.2).sub.n—H  (1) where R.sup.1 denotes a hydrogen atom, a hydrocarbon group that has from 1 to 24 carbon atoms and may have a hydroxyl group, or a group represented by R.sup.2CO, where the R.sup.2 denotes a hydrocarbon group having from 1 to 24 carbon atoms; and n indicates an average degree of polymerization of a glycerin unit shown in the parentheses, and is from 2 to 60.

A ratio obtained by dividing a number of pits by a number of screw dislocations is equal to or smaller than 1%. The first main surface has a surface roughness equal to or smaller than 0.15 nm. An absolute value of a difference between the first wave number and the second wave number is equal to or smaller than 0.2 cm.sup.−1, and an absolute value of a difference between the first full width at half maximum and the second full width at half maximum is equal to or smaller than 0.25 cm.sup.−1.

A method for grinding a silicon carbide wafer includes the following steps. Firstly, a single crystal is sliced into several wafers, in which each wafer has a silicon-side surface, which is the first surface. The opposite side is a carbon-side surface, which is the second surface. Subsequently, the silicon-side of the wafer is faced down and placed on a grinding stage for performing a first grinding process. It should be noted that a supporting structure exist between the wafer and the grinding stage. The supporting structure can have a concave or a convex framework. After grinding the carbon-side and removing the wafer from the stage, the wafer will appear convex or concave shape on the carbon-side surface. Thereafter, the wafer is flipped upside down and the carbon-side is placed on a flat stage without any supporting structure. Finally, the silicon-side is ground as a second grinding process.