A method of manufacture and structure for a monolithic single chip single crystal device. The method can include forming a first single crystal epitaxial layer overlying the substrate and forming one or more second single crystal epitaxial layers overlying the first single crystal epitaxial layer. The first single crystal epitaxial layer and the one or more second single crystal epitaxial layers can be processed to form one or more active or passive device components. Through this process, the resulting device includes a monolithic epitaxial stack integrating multiple circuit functions.

A semiconductor thin film structure may include a substrate, a buffer layer on the substrate, and a semiconductor layer on the buffer layer, such that the buffer layer is between the semiconductor layer and the substrate. The buffer layer may include a plurality of unit layers. Each unit layer of the plurality of unit layers may include a first layer having first bandgap energy and a first thickness, a second layer having second bandgap energy and a second thickness, and a third layer having third bandgap energy and a third thickness. One layer having a lowest bandgap energy of the first, second, and third layers of the unit layer may be between another two layers of the first, second, and third layers of the unit layer.

Provided is an electronic device using an interface between BaSnO.sub.3 and LaInO.sub.3, the electronic device including: a substrate formed of a metal oxide of non-SrTiO.sub.3 material a first buffer layer disposed on the substrate and formed of a BaSnO.sub.3 material; a BLSO layer disposed on at least a portion of the first buffer layer and formed of a (Ba.sub.1-x, La.sub.x)SnO.sub.3 material, wherein x has a value equal to or greater than 0 and less than or equal to 1; an LIO layer at least partially disposed on at least a portion of the BLSO layer so as to form an interface between the LIO layer and the BLSO layer, and formed of an LaInO.sub.3 material; and a first electrode layer at least partially in contact with the interface between the BLSO layer and the LIO layer, and formed of at least two or more separated portions.

Disclosed is a preparation method for a semiconductor structure. The semiconductor structure includes: a substrate; an epitaxial layer and an epitaxial structure that are stacked on the substrate in sequence. The epitaxial layer is doped with a doping element. In the forming process, a sacrificial layer is formed on the epitaxial layer, and the sacrificial layer is repeatedly etched, such that a concentration of the doping element in the epitaxial layer is lower than a preset value. In this application, the sacrificial layer is formed on the epitaxial layer, and the sacrificial layer is repeatedly etched, such that the concentration of the doping element in the epitaxial layer is lower than the preset value, so as to prevent the doping element in the epitaxial layer from being precipitated upward into an upper-layer structure, ensure the mobility of electrons in a channel layer, and improve the performance of a device.

A GaN single crystal having a gallium polar surface which is a main surface on one side and a nitrogen polar surface which is a main surface on the opposite side, wherein on the gallium polar surface is found at least one square area, an outer periphery of which is constituted by four sides of 2 mm or more in length, and, when the at least one square area is divided into a plurality of sub-areas each of which is a 100 μm×100 μm square, pit-free areas account for 80% or more of the plurality of sub-areas.

A method for growth and fabrication of semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices, comprising identifying desired material properties for a particular device application, selecting a semipolar growth orientation based on the desired material properties, selecting a suitable substrate for growth of the selected semipolar growth orientation, growing a planar semipolar (Ga,Al,In,B)N template or nucleation layer on the substrate, and growing the semipolar (Ga,Al,In,B)N thin films, heterostructures or devices on the planar semipolar (Ga,Al,In,B)N template or nucleation layer. The method results in a large area of the semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices being parallel to the substrate surface.

A nitride semiconductor template includes a heterogeneous substrate, a first nitride semiconductor layer that is formed on one surface of the heterogeneous substrate, includes a nitride semiconductor and has an in-plane thickness variation of not more than 4.0%, and a second nitride semiconductor layer that is formed on an annular region including an outer periphery of an other surface of the heterogeneous substrate, includes the nitride semiconductor and has a thickness of not less than 1 μm.

A field-effect transistor and method for fabricating such a field-effect transistor that utilizes an air-sensitive two-dimensional material (e.g., silicene). A film of air-sensitive two-dimensional material is deposited on a crystalized metallic (e.g., Ag) thin film on a substrate (e.g., mica substrate). A capping layer of insulating material (e.g., aluminum oxide) is deposited on the air-sensitive two-dimensional material. The substrate is detached from the metallic thin film/air-sensitive two-dimensional material/insulating material stack structure. The metallic thin film/air-sensitive two-dimensional material/insulating material stack structure is then flipped. The flipped metallic thin film/air-sensitive two-dimensional material/insulating material stack structure is attached to a device substrate followed by having the metallic thin film etched to form contact electrodes. In this manner, the pristine properties of air-sensitive two-dimensional materials are preserved from degradation when exposed to air. Furthermore, this new technique allows safe transfer and device fabrication of air-sensitive two-dimensional materials with a low material and process cost.

A mist-CVD apparatus contains a first atomizer for atomizing a first metal oxide precursor and generating a first mist of the first metal oxide precursor; a second atomizer for atomizing a second metal oxide precursor and generating a second mist of the second metal oxide precursor; a carrier-gas supplier for supplying a carrier gas to convey the first and second mists; a film-forming unit for forming a film on a substrate by subjecting the first and second mists to a thermal reaction; and a first conveyance pipe through which the first mist and the carrier gas are conveyed to the film forming chamber, a second conveyance pipe through which the second mist and the carrier gas are conveyed to the film forming chamber.

A semiconductor device includes a plurality of column portions including a semiconductor. The plurality of column portions each includes a source region, a drain region, and a channel formation region including a channel formed between the source region and the drain region. The semiconductor device further includes a gate electrode provided, via an insulating layer, at a side wall of the channel formation region, and also includes a first semiconductor layer provided at a side wall of the drain region. A conductive type of the first semiconductor layer differs from a conductive type of the semiconductor included in the drain region.