H01L21/31122

ALLOY FILM ETCH
20230047486 · 2023-02-16 ·

A method for forming etched features in a layer of a first material is provided. A layer of a second material is deposited over the layer of the first material. An alloy layer of the first material and the second material is formed between the layer of the first material and the layer of the second material. The layer of the first material is selectively etched with respect to the alloy layer, using the alloy layer as a hardmask.

Spacers for semiconductor devices including backside power rails

Semiconductor devices including air spacers formed in a backside interconnect structure and methods of forming the same are disclosed. In an embodiment, a device includes a first transistor structure; a front-side interconnect structure on a front-side of the first transistor structure; and a backside interconnect structure on a backside of the first transistor structure, the backside interconnect structure including a first dielectric layer on the backside of the first transistor structure; a first via extending through the first dielectric layer, the first via being electrically coupled to a source/drain region of the first transistor structure; a first conductive line electrically coupled to the first via; and an air spacer adjacent the first conductive line in a direction parallel to a backside surface of the first dielectric layer.

TIN OXIDE THIN FILM SPACERS IN SEMICONDUCTOR DEVICE MANUFACTURING

Thin tin oxide films are used as spacers in semiconductor device manufacturing. In one implementation, thin tin oxide film is conformally deposited onto a semiconductor substrate having an exposed layer of a first material (e.g., silicon oxide or silicon nitride) and a plurality of protruding features comprising a second material (e.g., silicon or carbon). For example, 10-100 nm thick tin oxide layer can be deposited using atomic layer deposition. Next, tin oxide film is removed from horizontal surfaces, without being completely removed from the sidewalls of the protruding features. Next, the material of protruding features is etched away, leaving tin oxide spacers on the substrate. This is followed by etching the unprotected portions of the first material, without removal of the spacers. Next, underlying layer is etched, and spacers are removed. Tin-containing particles can be removed from processing chambers by converting them to volatile tin hydride.

Bipolar junction transistor (BJT) comprising a multilayer base dielectric film

Various embodiments of the present disclosure are directed towards a method for forming a bipolar junction transistor (BJT). A dielectric film is deposited over a substrate and comprises a lower dielectric layer, an upper dielectric layer, and an intermediate dielectric layer between the lower and upper dielectric layers. A first semiconductor layer is deposited over the dielectric film and is subsequently patterned to form an opening exposing the dielectric film. A first etch is performed into the upper dielectric layer through the opening to extend the opening to the intermediate dielectric layer. Further, the first etch stops on the intermediate dielectric layer and laterally undercuts the first semiconductor layer. Additional etches are performed to extend the opening to the substrate. A lower base structure and an emitter are formed stacked in and filling the opening, and the first semiconductor layer is patterned to form an upper base structure.

ADVANCED SELF ALIGNED MULTIPLE PATTERNING USING TIN OXIDE
20230238238 · 2023-07-27 ·

Methods and apparatuses for performing spacer on spacer multiple patterning schemes using an exhumable first spacer material and a complementary second spacer material. Certain embodiments involve using a tin oxide spacer material for one of the spacer materials in spacer on spacer self aligned multiple patterning.

SEMICONDUCTOR FABRICATING METHOD
20230005749 · 2023-01-05 ·

A semiconductor fabricating method for a film to be processed containing a transition metal on an upper surface of a semiconductor wafer placed in a processing chamber in a container being etched with a gas for complexing the transition metal supplied into the processing chamber, including a first step of adsorbing, to the film, the complexing gas, while supplying the complexing gas, then increasing a temperature of the wafer to form an organic metal complex on a surface of the film, and volatilizing and desorbing the organic metal complex, and a second step of adsorbing, to the surface of the film, the complexing gas at a low temperature, while supplying the complexing gas, then stopping the supply of the complexing gas, and stepwise increasing the temperature of the wafer to volatilize and desorb an organic metal complex formed on the surface of the film.

Atomic layer etching on microdevices and nanodevices

The present invention relates to the unexpected discovery of novel methods of preparing nanodevices and/or microdevices with predetermined patterns. In one aspect, the methods of the invention allow for engineering structures and films with continuous thickness equal to or less than 50 nm.

Substrate processing apparatus, signal source device, method of processing material layer, and method of fabricating semiconductor device

A substrate processing apparatus includes a processing chamber; a susceptor provided in the processing chamber, wherein the susceptor is configured to support a substrate; a first plasma generator disposed on one side of the processing chamber; and a second plasma generator disposed on another side of the processing chamber, wherein the second plasma generator is configured to generate plasma by simultaneously supplying a sinusoidal wave signal and a non-sinusoidal wave signal to the susceptor. By using a substrate processing apparatus, a signal source device, and a method of processing a material layer according to the inventive concept, a smooth etched surface may be obtained for a crystalline material layer without a risk of device damage by RDC.

SEMICONDUCTOR MANUFACTURING METHOD AND SEMICONDUCTOR MANUFACTURING APPARATUS
20230027528 · 2023-01-26 ·

A semiconductor manufacturing method using a semiconductor manufacturing apparatus 100 including a treating chamber 1, the method including: a first process of supplying a complexing gas into the treating chamber in which a wafer 2 having a surface having a transition metal-containing film formed thereon is placed, to adsorb an organic compound as a component of the complexing gas to the transition metal-containing film, the transition metal-containing film containing a transition metal element; and a second process of heating the wafer in which the organic compound is adsorbed to the transition metal-containing film, to react the organic compound with the transition metal element, thereby converting the organic compound into an organometallic complex, and desorbing the organometallic complex, wherein the organic compound has Lewis basicity, and is a multidentate ligand molecule capable of forming a bidentate or more coordination bond with the transition metal element.

METHOD FOR PROCESSING SEMICONDUCTOR STRUCTURE
20230022624 · 2023-01-26 · ·

A method for processing a semiconductor structure includes: a substrate is provided, which has feature parts, in which an aspect ratio of the feature parts is greater than a preset aspect ratio, a barrier layer is disposed on tops of the feature parts, a hydrophilic layer is disposed on side walls of the feature parts, and there are particulate impurities on a surface of the hydrophilic layer; at least one cleaning treatment to the substrate is performed, in which the cleaning treatment includes: initial water vapor is introduced to the side walls of the feature parts, and a cooling treatment is performed to liquefy the initial water vapor adhering to a surface of the hydrophilic layer into water which carries the particulate impurities and flows into grooves; and a heating treatment is performed to evaporate the water into water vapor which carries the particulate impurities and escapes.