Methods for etching a semiconductor structure and for conditioning a processing reactor in which a single semiconductor structure is treated are disclosed. An engineered polycrystalline silicon surface layer is deposited on a susceptor which supports the semiconductor structure. The polycrystalline silicon surface layer may be engineered by controlling the temperature at which the layer is deposited, by grooving the polycrystalline silicon surface layer or by controlling the thickness of the polycrystalline silicon surface layer.

A method for etching a tungsten silicide (WSix) layer during formation of a gate electrode in an integrated circuit is disclosed. The method uses an etchant gas comprising nitrogen gas (N.sub.2) and oxygen gas (O.sub.2) in a specified flow ratio. The etchant gas may also comprise chlorine gas (Cl.sub.2) and tetrafluoromethane (CF.sub.4). The selectivity of the etchant gas containing O.sub.2 for WSix versus polysilicon is much higher, which reduces overetching and provides more control in methods for producing a gate electrode. A gate electrode produced by such a method is also disclosed.

Three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor patterns and the electrode structure, the first pattern vertically extending to cross the electrodes and the second pattern horizontally extending to cross the semiconductor patterns.

Methods for selectively etching SiGe relative to Si are provided. Some of the methods incorporate formation of a passivation layer on a surface of the Si layer to enhance SiGe etchant selectivity and the use of interhalogen gases that preferentially etch the SiGe as opposed to the Si in the presence of the passivation layer. The methods can occur in a cyclic manner until the desired thickness of the SiGe layer is obtained.

The present application relates to a semiconductor device with an intervening layer and a method for fabricating the semiconductor device with the intervening layer. The semiconductor device includes a substrate, a bottom conductive plug positioned on the substrate, an intervening conductive layer positioned on the bottom conductive plug, and a top conductive plug positioned on the intervening conductive layer. A top surface of the intervening conductive layer is non-planar.

A method for reducing wiggling in a line includes forming a silicon patterning layer over a substrate and depositing a mask layer over the silicon patterning layer. The mask layer is patterned to form one or more openings therein. The mask layer is thinned and the one or more openings are widened, to provide a smaller height-to-width ratio. The pattern of the mask layer is then used to pattern the silicon patterning layer. The silicon patterning layer is used, in turn, to pattern a target layer where a metal line will be formed.

A semiconductor device includes a substrate; a fin structure formed on a substrate; and a gate feature formed over the fin structure, the gate feature comprising a gate dielectric layer, wherein the gate dielectric layer traverses the fin structure to overlay a central portion of the fin structure and opposite side portions of the fin structure that are located in respective undercuts formed in respective portions of a dielectric layer located adjacent to opposite sidewalls of the gate feature, wherein the undercuts extend beyond respective sidewalls of the gate feature and away from the central portion of the fin structure.

Thin tin oxide films are used as spacers in semiconductor device manufacturing. In one implementation, thin tin oxide film is conformally deposited onto a semiconductor substrate having an exposed layer of a first material (e.g., silicon oxide or silicon nitride) and a plurality of protruding features comprising a second material (e.g., silicon or carbon). For example, 10-100 nm thick tin oxide layer can be deposited using atomic layer deposition. Next, tin oxide film is removed from horizontal surfaces, without being completely removed from the sidewalls of the protruding features. Next, the material of protruding features is etched away, leaving tin oxide spacers on the substrate. This is followed by etching the unprotected portions of the first material, without removal of the spacers. Next, underlying layer is etched, and spacers are removed. Tin-containing particles can be removed from processing chambers by converting them to volatile tin hydride.

The present invention aims to provide a dry etching agent having less load on global environment and capable of anisotropic etching without the use of special equipment and obtaining a good processing shape and to provide a dry etching method using the dry etching agent. The dry etching agent according the present invention contains at least a hydrofluoroalkylene oxide represented by the following chemical formula: CF.sub.3—C.sub.xH.sub.yF.sub.zO (where x=2 or 3; y=1, 2, 3, 4 or 5; and z=2x−1−y) and having an oxygen-containing three-membered ring. The dry etching method according to the present invention includes selectively etching of at least one kind of silicon-based material selected from the group consisting of silicon dioxide, silicon nitride, polycrystalline silicon, amorphous silicon and silicon carbide with the use of a plasma gas generated by plasmatization of the dry etching agent.

A substrate processing apparatus includes a processing chamber; a susceptor provided in the processing chamber, wherein the susceptor is configured to support a substrate; a first plasma generator disposed on one side of the processing chamber; and a second plasma generator disposed on another side of the processing chamber, wherein the second plasma generator is configured to generate plasma by simultaneously supplying a sinusoidal wave signal and a non-sinusoidal wave signal to the susceptor. By using a substrate processing apparatus, a signal source device, and a method of processing a material layer according to the inventive concept, a smooth etched surface may be obtained for a crystalline material layer without a risk of device damage by RDC.