A wafer processing method for processing a wafer formed on a front surface thereof with a plurality of devices having projection-shaped electrodes, the devices being partitioned by streets, includes a cutting step of holding a back surface of the wafer by a holding surface of a chuck table and cutting head portions of the projection-shaped electrodes by a cutting tool slewed in parallel to the holding surface, to make uniform the electrodes in height and expose metallic surfaces; a thermocompression bonding sheet laying step of laying a thermocompression bonding sheet on the front surface of the wafer; a thermocompression bonding step of heating and pressing the thermocompression bonding sheet to perform thermocompression bonding; and a peeling step of peeling off the thermocompression bonding sheet from the wafer, before dividing the wafer into individual device chips and bonding the electrodes to a circuit board.

A wafer processing method for processing a wafer formed on a front surface thereof with a plurality of devices having projection-shaped electrodes, the devices being partitioned by streets, includes a cutting step of holding a back surface of the wafer by a holding surface of a chuck table and cutting head portions of the projection-shaped electrodes by a cutting tool slewed in parallel to the holding surface, to make uniform the electrodes in height and expose metallic surfaces; a thermocompression bonding sheet laying step of laying a thermocompression bonding sheet on the front surface of the wafer; a thermocompression bonding step of heating and pressing the thermocompression bonding sheet to perform thermocompression bonding; and a peeling step of peeling off the thermocompression bonding sheet from the wafer, before dividing the wafer into individual device chips and bonding the electrodes to a circuit board.

A wafer processing method includes a polyester sheet providing step of positioning a wafer in an inside opening of a ring frame and providing a polyester sheet on a back side or a front side of the wafer and on a back side of the ring frame, a uniting step of heating the polyester sheet as applying a pressure to the polyester sheet to thereby unite the wafer and the ring frame through the polyester sheet by thermocompression bonding, a dividing step of applying a laser beam to the wafer to form shield tunnels in the wafer, thereby dividing the wafer into individual device chips, and a pickup step of applying an ultrasonic wave to the polyester sheet, pushing up each device chip through the polyester sheet, and picking up each device chip from the polyester sheet.

A wafer processing method includes a polyester sheet providing step of positioning a wafer in an inside opening of a ring frame and providing a polyester sheet on a back side or a front side of the wafer and on a back side of the ring frame, a uniting step of heating the polyester sheet as applying a pressure to the polyester sheet to thereby unite the wafer and the ring frame through the polyester sheet by thermocompression bonding, a dividing step of applying a laser beam to the wafer to form shield tunnels in the wafer, thereby dividing the wafer into individual device chips, and a pickup step of applying an ultrasonic wave to the polyester sheet, pushing up each device chip through the polyester sheet, and picking up each device chip from the polyester sheet.

In some embodiments of the present disclosure, a method for forming a semiconductor device is described. A semiconductor layer is formed and a dielectric layer is formed. A pressurized treatment is performed to transform the semiconductor layer into a low-doping semiconductor layer and transform the dielectric layer into a crystalline ferroelectric layer. A gate layer is formed. An insulating layer is formed over the gate layer, the crystalline ferroelectric layer and the low-doping semiconductor layer. Contact openings are formed in the insulating layer exposing portions of the low-doping semiconductor layer. Source and drain terminals are formed on the low-doping semiconductor layer.

In some embodiments of the present disclosure, a method for forming a semiconductor device is described. A semiconductor layer is formed and a dielectric layer is formed. A pressurized treatment is performed to transform the semiconductor layer into a low-doping semiconductor layer and transform the dielectric layer into a crystalline ferroelectric layer. A gate layer is formed. An insulating layer is formed over the gate layer, the crystalline ferroelectric layer and the low-doping semiconductor layer. Contact openings are formed in the insulating layer exposing portions of the low-doping semiconductor layer. Source and drain terminals are formed on the low-doping semiconductor layer.

This patent application relates to methods and apparatus for temperature modification and reduction of contamination in bonding stacked microelectronic devices with heat applied from a bond head of a thermocompression bonding tool. The stack is substantially enclosed within a skirt carried by the bond head to reduce heat loss and contaminants from the stack, and heat may be added from the skirt.

This patent application relates to methods and apparatus for temperature modification and reduction of contamination in bonding stacked microelectronic devices with heat applied from a bond head of a thermocompression bonding tool. The stack is substantially enclosed within a skirt carried by the bond head to reduce heat loss and contaminants from the stack, and heat may be added from the skirt.

A first transfer device and a second transfer device are configured to transfer a first substrate and a second substrate in a normal pressure atmosphere. A third transfer device is configured to transfer the first substrate and the second substrate in a decompressed atmosphere. A load lock chamber has accommodation sections allowed to accommodate therein the first substrate and the second substrate, and is allowed to switch an inside of the accommodation sections between the normal pressure atmosphere and the decompressed atmosphere. Multiple gates are respectively disposed on three different sides of the load lock chamber, and allowed to open or close the load lock chamber. The first transfer device, the second transfer device, and the third transfer device carry the first substrate and the second substrate into/out of the load lock chamber through different gates among the multiple gates.

A first transfer device and a second transfer device are configured to transfer a first substrate and a second substrate in a normal pressure atmosphere. A third transfer device is configured to transfer the first substrate and the second substrate in a decompressed atmosphere. A load lock chamber has accommodation sections allowed to accommodate therein the first substrate and the second substrate, and is allowed to switch an inside of the accommodation sections between the normal pressure atmosphere and the decompressed atmosphere. Multiple gates are respectively disposed on three different sides of the load lock chamber, and allowed to open or close the load lock chamber. The first transfer device, the second transfer device, and the third transfer device carry the first substrate and the second substrate into/out of the load lock chamber through different gates among the multiple gates.