Provided is a photoelectric conversion device including: a pixel including a plurality of photoelectric conversion units; and a select unit configured to control each of the plurality of photoelectric conversion units to be in an active state or an inactive state. The plurality of photoelectric conversion units has a first group including a first avalanche diode and a second group including a second avalanche diode. The select unit controls the second group to be in the inactive state in a first case of controlling the first group to be in the active state, and the select unit controls the first group to be in the inactive state in a second case of controlling the second group to be in the active state. The pixel has no photoelectric conversion unit which is in the active state in both the first case and the second case.

Provided is a photoelectric conversion device including: a pixel including a plurality of photoelectric conversion units; and a select unit configured to control each of the plurality of photoelectric conversion units to be in an active state or an inactive state. The plurality of photoelectric conversion units has a first group including a first avalanche diode and a second group including a second avalanche diode. The select unit controls the second group to be in the inactive state in a first case of controlling the first group to be in the active state, and the select unit controls the first group to be in the inactive state in a second case of controlling the second group to be in the active state. The pixel has no photoelectric conversion unit which is in the active state in both the first case and the second case.

A charge-coupled device (CCD) image sensor is provided. The CCD image sensor may include an array of photosensors that transfer charge to multiple vertical CCD shift registers, which then in turn transfer the charge to a horizontal CCD shift register. The horizontal CCD shift register then feeds an output buffer circuit. The output buffer circuit can include multiple output stages, each of which can include a source-follower transistor coupled in series with a current sink transistor and at least one cascode transistor. The current sink transistor may have its gate terminal shorted to ground. In one arrangement, the cascode transistor has a gate terminal that receives a non-zero bias voltage. In another arrangement, the cascode transistor has a gate terminal that is also shorted to ground and operates in depletion mode.

This solid-state imaging device 100 has: a photosensitive part that includes pixel portions 211, which are disposed in a matrix, and charge transfer parts 212 for transferring, by the column, the signal charge of the pixel portions; a plurality of charge storage parts 220 that accumulate the signal charges transferred by the plurality of charge transfer parts of the photosensitive part; a relay part 240 that relays the transfer of the signal charges transferred by the plurality of charge transfer parts to each charge storage part; an output part 230 that outputs the signal charges of the plurality of charge storage parts as electric signals; a first substrate 110 at which the photosensitive unit 210 is formed; and a second substrate 120 at which the charge storage part 220 and output unit 230 are formed. The first substrate and second substrate are stacked together, and the relay part 240 electrically couples the charge transfer parts of the first substrate to the charge storage parts of the second substrate by means of a connecting parts passing through the substrates outside the photosensitive region of the photosensitive part.

Each pixel region PX includes a photoelectric conversion region S1, a resistive gate electrode R, a first transfer electrode T1, a second transfer electrode T2, a barrier region B positioned directly beneath the first transfer electrode T1 in a semiconductor substrate 10, and a charge accumulation region S2 positioned directly beneath the second transfer electrode T2 in the semiconductor substrate 10. An impurity concentration of the barrier region B is lower than an impurity concentration of the charge accumulation region S2, and the first transfer electrode T1 and the second transfer electrode T2 are electrically connected to each other.