Patent classifications
H
H03
H03F
3/00
H03F3/45
H03F3/45071
H03F3/45076
H03F3/45376
H03F3/45394
H03F3/45399
H03F3/45399
RF PEAK DETECTOR CIRCUIT
An apparatus comprises a transistor pair including a first metal oxide semiconductor field effect transistor (MOSFET) coupled to a second MOSFET. The first MOSFET includes a first gate terminal and a first drain terminal. The second MOSFET comprises a second gate terminal and a second drain terminal. The first gate terminal is configured to receive a first signal. The second gate terminal is configured to receive a second signal that is phase shifted with respect to the first signal. An output node is coupled to the first drain terminal and the second drain terminal and configured to output a third signal that is proportional to a power of the first signal and the second signal.