Devices, systems, and methods for multi-channel common-mode coupled alternating current (AC) gain amplifiers (MC-CM-AC Amp) are disclosed. The MC-CM-AC Amp can comprise a first operational amplifier including: a first non-inverting input port configured to be coupled to a first input signal, and a first inverting input port configured to be coupled to a first capacitor. The MC-CM-AC Amp can comprise a second operational amplifier including a second non-inverting input port configured to be coupled to a second input signal, and a second inverting input port configured to be coupled to a second capacitor. The MC-CM-AC Amp can comprise one or more gain-setting resistors configured to be coupled between the first capacitor and the second capacitor.

A clock driver circuit, including: an input stage, a double-ended to single-ended conversion stage and a driver output stage connected in sequence. The input stage includes two mutually loaded differential amplifiers and a common mode negative feedback loop. The differential amplifiers are connected to a differential clock signal for amplification to generate a common mode voltage. The common mode feedback circuit is connected to an output end of the differential amplifiers to stabilize the output amplitude of the common mode voltage. The double-ended to single-ended conversion stage converts a differential sine clock signal output by the double-ended common mode voltage into a single-ended square wave clock signal. The driver output stage includes a multi-stage cascaded push-pull phase inverter to improve the drive capability of the square wave clock signal.

A differential amplifier is provided, in which generation of unnecessary harmonic distortion in the differential output signal is suppressed. A common mode feedback circuit increases or decreases operating points of an inverting output terminal and a non-inverting output terminal such that an intermediate voltage of voltages respectively provided to an inverting input terminal and a non-inverting input terminal is consistent with to a reference voltage. Variations in voltage at the inverting input terminal and the non-inverting input terminal are suppressed, variations in electrical properties of elements connected to the input terminals are suppressed. Therefore, it is possible to suppress generation of harmonic distortion in the output signals from the inverting output terminal and the non-inverting output terminal.

The present invention relates to an operational amplifier, including: a symmetrical differential amplifier; a local common mode feedback circuit coupled to the symmetrical differential amplifier; a tail current source circuit including at least one first transistor and a second transistor and a current source resistor. The tail current source circuit is configured to adjust a control voltage of the first transistor by using the second transistor such that a predetermined reference current flows through a load path of the first transistor.

A compensated amplifier for use in a power converter controller. The compensated amplifier comprises a first amplifier, a second amplifier, an integrator, and an arithmetic operator. The first amplifier coupled to receive a sensed signal and a reference signal and configured to generate a first error signal in response to the sensed signal and the reference signal. The second amplifier coupled to the first amplifier and configured to generate a second error signal in response to the sensed signal and the reference signal. The integrator coupled to the first amplifier and configured to generate an integrated error signal in response to the first error signal. The arithmetic operator coupled to the integrator and to the second amplifier, wherein the arithmetic operator is configured to generate a control signal in response to the integrated error signal and the second error signal.

A bias structure includes a reference voltage node connected to gate structures of a first NMOS transistor and a second NMOS transistor, a bias voltage node comprising a bias voltage, and a first op amp having a first input connected to the reference voltage, a second input connected to a drain of the first NMOS transistor, and an output connected to gate structures of a first PMOS transistor and a second PMOS transistor. The bias structure further includes a second op amp having a first input connected to the reference voltage, a second input connected to a drain of the second NMOS transistor, and an output connected to a gate structure of a third NMOS transistor and the bias voltage node. The first NMOS transistor matches a transistor of a differential pair of an integrated circuit device.

Memories for receiving or transmitting voltage signals might include an input or output buffer including a first stage having first and second inputs and configured to generate a current sink and source at its first and second outputs responsive to a voltage difference between its first and second inputs, and a second stage having a first input connected to the first output of the first stage, a second input connected to the second output of the first stage, a first voltage signal node connected to its first input through a first resistance, and a second voltage signal node connected to its second input through a second resistance, wherein a first inverter is connected in parallel with the first resistance, a second inverter is connected in parallel with the second resistance, and a pair of cross-coupled inverters are connected between the first voltage signal node and the second voltage signal node.

A current feedback amplifier (CFA). The CFA includes a common-gate input stage, a biasing circuitry, and a differential pair coupled in parallel between the supply voltage node and the reference voltage node. The common-gate input stage amplifies an input signal received at an input node and supplies it to a gate of the complementary transistors of the differential pair. The biasing circuitry supplies a bias voltage to a gate of the transistors of the common-gate input stage. The input node of the common-gate input stage and a node between the complementary transistors in the first path of the differential pair are shorted.

A fully differential amplifier includes: an input stage comprising a first amplification circuit and a second amplification circuit, one of which is configured to generate a push signal and the other of which is configured to generate a pull signal, each by amplifying a differential input signal; an output stage for generating a differential output signal based on the push signal and the pull signal; and a feedback circuit for providing common mode feedback to the first amplification circuit based on the differential output signal, wherein the second amplification circuit may include a passive network for setting a common mode voltage of the push signal or the pull signal.

Devices, systems, and methods for multi-channel common-mode coupled alternating current (AC) gain amplifiers (MC-CM-AC Amp) are disclosed. The MC-CM-AC Amp can comprise a first operational amplifier including: a first non-inverting input port configured to be coupled to a first input signal, and a first inverting input port configured to be coupled to a first capacitor. The MC-CM-AC Amp can comprise a second operational amplifier including a second non-inverting input port configured to be coupled to a second input signal, and a second inverting input port configured to be coupled to a second capacitor. The MC-CM-AC Amp can comprise one or more gain-setting resistors configured to be coupled between the first capacitor and the second capacitor.