A current sense circuit is described herein. In accordance with one embodiment, the circuit comprises: a first circuit node and a second circuit node configured to be coupled to a first terminal and a second terminal of a current sense resistor, respectively; an differential amplifier having a first input and a second input which are coupled to the first circuit node and the second circuit node via a first input resistor and a second input resistor; a voltage source, configured to set the voltage at the first input of the differential amplifier to a predefined DC voltage; and a controllable current mirror configured to sink or source a first current in its input branch based on one or more outputs of the differential amplifier and to generate a corresponding second current in its output branch. The input branch is coupled to the second input of the differential amplifier. A biasing circuit is configured to generate a bias current and is coupled to the controllable current mirror to superpose the bias current with either the first current or the second current.

A high CMRR neural signal amplifier is configured for supply rail common mode feedback (SR-CMFB) whereby a set of CMFB signals is provided to supply rails of front end LNAs. High CMRR is maintained through buffering outputs of front end signal LNAs and a reference LNA coupled to signal and reference inputs of second stage amplifiers, respectively; and buffering the reference LNA output using an active/guard buffer pair, whereby across a plurality of distinct multiplexing time intervals, during each multiplexing time interval one buffer of the pair functions as an active buffer that drives second stage amplifier reference inputs corresponding to second stage amplifier outputs being multiplexed to a set of multiplexor outputs, and the other buffer of the pair functions as a guard buffer coupled to other second stage amplifier reference inputs corresponding to second stage amplifier outputs not being multiplexed to the set of multiplexor outputs.

Disclosed herein is a method including sinking current from a pair of input transistors of a differential amplifier while sourcing more current to the pair of input transistors than is sunk. The method further includes generating a pair of input differential signals using a pair of input voltage regulators, and amplifying a difference between the pair of input differential signals to produce a pair of differential output voltages, using the differential amplifier. The method also includes amplifying the pair of differential output voltages using at least one voltage gain amplifier, and generating control signals for current sources that source the current to the pair of input transistors of the differential amplifier, from the pair of differential output voltages after at least amplification.

Disclosed herein is a method including sinking current from a pair of input transistors of a differential amplifier while sourcing more current to the pair of input transistors than is sunk. The method further includes generating a pair of input differential signals using a pair of input voltage regulators, and amplifying a difference between the pair of input differential signals to produce a pair of differential output voltages, using the differential amplifier. The method also includes amplifying the pair of differential output voltages using at least one voltage gain amplifier, and generating control signals for current sources that source the current to the pair of input transistors of the differential amplifier, from the pair of differential output voltages after at least amplification.

Disclosed herein is a circuit including a differential amplifier having a pair of input transistors coupled in a differential arrangement between adjustable current sources and receiving input differential signals from a pair of input voltage regulators. The adjustable current sources are configured to source more current to the pair of input transistors than current that is sunk from the pair of input transistors. A first amplifier has inputs coupled to receive differential output voltages from the differential amplifier. A second amplifier has inputs coupled to receive amplified differential output voltages from the first amplifier. A low pass filter has inputs coupled to receive further amplified differential output voltages from the second amplifier and produce final differential output voltages.

A leakage compensation circuit includes a buffer amplifier, a link coupling element, and a leakage compensation element. The buffer amplifier has an input coupled to a sense node, and an output. The link coupling element has an input coupled to the output of the buffer amplifier, and an output, wherein the link coupling element is unidirectional in a direction from the input to the output thereof. The leakage compensation element has a first current terminal coupled to the sense node, a control terminal coupled to the output of the link coupling element, and a second current terminal coupled to a reference voltage terminal.

A method for calculating a calibration gain used for common-mode rejection in a current sensing system may include measuring a first value of a common-mode voltage associated with the current sensing system and a first output value of the current sensing system occurring at the first value of the common-mode voltage, measuring a second value of the common-mode voltage associated with the current sensing system and a second output value of the current sensing system occurring at the second value of the common-mode voltage, and based on a difference between the second output value of the current sensing system and the first output value of the current sensing system and a difference between the second value of the common-mode voltage and the first value of the common-mode voltage, calculating the calibration gain.

A signal processing circuit includes a signal receiving circuit for generating a first input signal and a second input signal; a signal output circuit for generating a first output signal and a second output signal according to the first input signal and the second input signal; a negative impedance circuit, for amplifying the first input signal at the first input terminal to generate a first amplified input signal at the second output terminal, and for amplifying the second input signal at the second input terminal to generate a second amplified input signal at the first output terminal; a first capacitor; a second capacitor; wherein the first capacitor and the second capacitor have different DC voltage levels at both terminals, such that the impedance-signal variation rate of the negative impedance circuit is lower than a predetermined level.

An operational amplifier includes: a first amplifier stage, configured to generate first output voltages according to first input voltages; a second amplifier stage, configured to generate second output voltages according to the first output voltages; a second output stage circuit, configured to replicate an equivalent or a scaled-down version of the first output stage circuit; a first common-mode feedback circuit, configured to keep an output common-mode voltage of the second output stage circuit at a predetermined value; a logic loop circuit configured to, when the operational amplifier operates in a direct current calibration phase, adjust a difference between the first output voltages; a bias circuit, configured to generate a voltage close to a common-mode voltage of the first output voltages produced after the operational amplifier is turned on, the voltage serving as a reference voltage of a second common-mode feedback circuit.

A leakage compensation circuit includes a buffer amplifier, a link coupling element, and a leakage compensation element. The buffer amplifier has an input coupled to a sense node, and an output. The link coupling element has an input coupled to the output of the buffer amplifier, and an output, wherein the link coupling element is unidirectional in a direction from the input to the output thereof. The leakage compensation element has a first current terminal coupled to the sense node, a control terminal coupled to the output of the link coupling element, and a second current terminal coupled to a reference voltage terminal.