Split cascade circuits include multiple cascade paths coupled between voltage supply rails. Each cascade path includes a pair of controllable switches. A feedback path is provided for at least one of the cascade circuit paths. An active load circuit may also have a split cascade structure. Multiple-stage circuits, for implementation in Trans-Impedance Amplifiers (TIAs) or analog Receive Front-End modules (RXFEs), for example, include multiple stages of split cascade circuits.

An operational amplifier includes a single-stage amplifier and a current controller. The single-stage amplifier receives an input signal, and amplifies the input signal to generate an output signal, wherein the single-stage amplifier includes a voltage controlled current source circuit that operates in response to a bias voltage input. The current controller receives the input signal, and generates the bias voltage input according to the input signal.

An operational amplifier includes a single-stage amplifier and a current controller. The single-stage amplifier receives an input signal, and amplifies the input signal to generate an output signal, wherein the single-stage amplifier includes a voltage controlled current source circuit that operates in response to a bias voltage input. The current controller receives the input signal, and generates the bias voltage input according to the input signal. The bias voltage input includes a first bias voltage, a second bias voltage, a third bias voltage, and a fourth bias voltage. None of the first bias voltage, the second bias voltage, the third bias voltage, and the fourth bias voltage is directly set by the input signal of the single-stage amplifier.

Methods and apparatus for a pixel system for providing power supply noise rejection. A photodetector has a first terminal coupled to a voltage supply and a second terminal and a differential transimpedance amplifier has a first input coupled to the second terminal of the photodetector. The differential transimpedance amplifier is configured to convert a singled ended output on the second terminal of the photodetector to a differential signal. A bias circuit is coupled to the differential transimpedance amplifier to bias the differential transimpedance amplifier and the photodetector.

Methods and apparatus for a pixel system for capturing active imaging data. The system includes a photodetector having a first terminal coupled to a voltage supply and a second terminal and a differential transimpedance amplifier having a first input coupled to the second terminal of the photodetector. A voltage discriminator has an input coupled to an output of the differential transimpedance amplifier and an output.

Methods and apparatus for a pixel system for correction of non-uniform photo-detector and pixel gains. The system includes a photodetector having a first terminal coupled to a voltage supply and a second terminal, a differential transimpedance amplifier having a first input coupled to the second terminal of the photodetector, and a bias circuit coupled to the differential transimpedance amplifier to set common mode feedback for the differential transimpedance amplifier and to set bias of the photodetector for correcting non-uniform photodetector gain. A digital-to-analog converter is coupled to the bias circuit to output multiple discrete voltage levels.

A differential to single-ended buffer amplifier with a swing suppression resistor in the differential amplification architecture is shown. The differential to single-ended buffer amplifier has a positive input terminal, a negative input terminal, a differential to single-ended operational amplifier (DISO op amp), and a swing suppression resistor. The DISO op amp has a non-inverting input terminal and an inverting input terminal respectively coupled to the positive input terminal and the negative input terminal, and it has a single-ended output terminal that outputs the output signal of the differential to single-ended buffer amplifier. The swing suppression resistor is connected between the negative input terminal of the differential to single-ended buffer amplifier and the non-inverting input terminal of the DISO op amp.

This application relates to driver circuitry (200) for receiving a digital input signal (D) and outputting, at first and second output nodes (203p, 203n), first and second analogue driving signals respectively for driving a transducer (101), e.g. loudspeaker, in a bridge-tied-load configuration. The driver circuitry may particularly be suitable for driving low-impedance transducers. The driver circuitry has first and second digital-to-analogue converters (201p, 201n) configured to receive the digital input signal and the outputs of the first and second digital-to-analogue converters are coupled to the first and second output nodes respectively. A differential-output amplifier circuit (202) has outputs connected to the first and second output nodes and is configured to regulate the outputs of the digital-to-analogue converters at output nodes to provide the analogue driving signals.

In a general aspect, a circuit can include an input circuit configured to receive an input signal, and an amplifier circuit coupled with the input circuit. The amplifier circuit can include an amplifier, and first and second feedback paths. The first feedback path can be from a positive output to a negative input of the amplifier, and the second feedback path can be from a negative output to a positive input of the first amplifier. The circuit can also include a loop circuit configured to provide a local feedback loop for the first amplifier and configured to control current flow into the positive input of the first amplifier and current flow into the negative input of the first amplifier. The circuit can also include a control circuit that is configured to enable the loop circuit in response to a magnitude of the input signal exceeding a threshold.

A MEMS sensor (1) comprises a MEMS transducer (10) being coupled to a MEMS interface circuit (20). The MEMS interface circuit (20) comprises a bias voltage generator (100), a differential amplifier (200), a capacitor (300) and a feedback control circuit (400). The bias voltage generator (100) generates a bias voltage (Vbias) for operating the MEMS transducer. The variable capacitor (300) is connected to one of the input nodes (I200a) of the differential amplifier (200). At least one of the output nodes (A200a, A200b) of the differential amplifier is coupled to a base terminal (T110) of an output filter (110) of the bias voltage generator (100). Any disturbing signal from the bias voltage generator (100) is a common-mode signal that is divided equally on the input nodes (I200a, I200b) of the differential amplifier (200) and is therefore rejected.