A signal receiver includes a first transistor, a second transistor, a load circuit, an amplifying circuit and a load circuit. The first transistor has a first end receiving a power voltage, and a control end receive a first input signal. The second transistor has a first end receiving the power voltage, and a control end receiving a second input signal, wherein the first input signal and the second input signal are differential signals and transit between a first voltage and a reference ground voltage, the first voltage is larger than the power voltage. The load circuit is coupled to the first transistor and the second transistor. The amplifying circuit generates an output signal according a first signal on the second end of the first transistor and a second signal on the second end of the second transistor.

The disclosure relates to an alternating current (AC) coupling circuit including first and second capacitors having first and second input terminals configured to receive an input differential signal and generate an output differential signal at first and second output terminals of the first and second capacitors. The AC coupling circuit further includes a baseline wander correction circuit configured to make the output differential signal resistant to baseline wander due to the input differential signal including one or more time intervals of unbalanced data. The baseline wander correction circuit includes a differential difference amplifier (DDA) having a first differential input configured to receive the input differential signal, a differential output configured to generate a compensation differential signal, and a second differential input configured to receive the compensation differential signal. The compensation differential signal is applied to the output terminals of the first and second capacitors via a pair of resistors, respectively.

A system may include a front end differential amplifier having two input terminals, two input resistors, each of the two input resistors coupled to a respective one of the two input terminals, and an input common mode biasing circuit for an output stage of the front end differential amplifier, the input common mode biasing circuit comprising two current sources configured to generate currents for biasing the output stage of the front end differential amplifier.

A system may include a front end differential amplifier having two input terminals, two input resistors, each of the two input resistors coupled to a respective one of the two input terminals, and an input common mode biasing circuit for an output stage of the front end differential amplifier, the input common mode biasing circuit comprising two current sources configured to generate currents for biasing the output stage of the front end differential amplifier.

Amplifying circuitry configured such that when a detection circuit detects an abnormal state in which the level of signals input to a main amplifying circuit exceeds a normal range, a control circuit sets the state of integration of signals in the integration circuit to a default state. When the detection circuit detects the abnormal state and then detects that an operating state returns to a normal state in which the level of signals input to the main amplifying circuit is included in the normal range, the control circuit cancels the setting of the default state in the integration circuit.

An interface circuit comprises a signal path including a front-end charge amplifier coupling an input of the interface circuit to an output of the interface circuit, and a DC control loop separate from the signal path. In some implementations, the interface circuit is part of a MEMS sensor that includes a MEMS transducer having an output coupled to the input of the interface circuit. The interface circuit can, in some cases, allow faster settling of the circuit to its steady-state operating point.

An interface circuit comprises a signal path including a front-end charge amplifier coupling an input of the interface circuit to an output of the interface circuit, and a DC control loop separate from the signal path. In some implementations, the interface circuit is part of a MEMS sensor that includes a MEMS transducer having an output coupled to the input of the interface circuit. The interface circuit can, in some cases, allow faster settling of the circuit to its steady-state operating point.

A programmable a fully-differential programmable gain amplifier for reducing distortion, switching transients and interference, and improving bandwidth. In one embodiment, the amplifier includes a programmable gain module, an amplifier coupled to the current mode outputs and a data latch circuit of the programmable gain module, the amplifier configured to apply common mode voltage to the data latch circuit, and a current-to-voltage converter. In one embodiment, the fully-differential programmable gain amplifier controls distortion and switching interference during amplification by sensing common mode signals to produce an error signal, and applying the resulting error signal to the programmable gain module for multiplying digital to analog conversion. Components of the fully-differential programmable gain amplifier provide compensation of distortion caused by nonlinearity of device switches and switch resistance, and can include a floating supply, galvanic isolation of control signals and a common mode voltage controller.

A circuit that receives AC power for rectification and analog DC control signals for processing. Two voltages may be noted. A first voltage may be between a supply ground and an internal device ground of a rectifier. A second voltage may be between a terminal of an input control signal source and the internal device ground. To get a control signal value, one may need a differential of those two voltages that can be accomplished with an operational amplifier configured as differential amplifier. A range of an input control signal may be from zero to a particular magnitude of voltage. A reasonably priced operational amplifier might not have an ability provide an output to zero. However, a linearized transistor output stage, having an output that can go to zero, may be connected to an output of the operational amplifier so as to effectively provide an output that goes to zero.

A programmable a fully-differential programmable gain amplifier for reducing distortion, switching transients and interference, and improving bandwidth. In one embodiment, the amplifier includes a programmable gain module, an amplifier coupled to the current mode outputs and a data latch circuit of the programmable gain module, the amplifier configured to apply common mode voltage to the data latch circuit, and a current-to-voltage converter. In one embodiment, the fully-differential programmable gain amplifier controls distortion and switching interference during amplification by sensing common mode signals to produce an error signal, and applying the resulting error signal to the programmable gain module for multiplying digital to analog conversion. Components of the fully-differential programmable gain amplifier provide compensation of distortion caused by nonlinearity of device switches and switch resistance, and can include a floating supply, galvanic isolation of control signals and a common mode voltage controller.