A circuit board according to an embodiment includes an insulating layer including a first via hole; a first via disposed in the first via hole of the insulating layer; wherein the first via includes: a first via part disposed in a first region of the first via hole; and a second via part disposed in a second region other than the first region of the first via hole; wherein the second region is a central region of the first via hole, and the first region is an outer region surrounding the second region; wherein the first via part and the second via part includes: a first surface in contact with each other; and a second surface other than the first surface exposed on the insulating layer; wherein the first surface has a first surface roughness; wherein the second surface has a second surface roughness different from the first surface roughness.

The present disclosure discloses a multilayer circuit board comprising a plurality of metal layers, a blind via and/or a buried via, the multilayer circuit board is capable of transmitting signal between the different metal layers. The blind via has a pad on a non-opening side of the blind via. An upper or lower layer metal layer on the non-opening side of the blind via adjacent to the blind via has a first hole which is located in a position corresponding to the pad on the non-opening side of the blind via in a depth direction of the blind via; and/or an upper and/or lower layer adjacent to the buried via has a second hole which is located in a position corresponding to the pad of an upper and/or lower orifice of the buried via in a depth direction of the buried via.

A single circuit board assembly for forming a vehicle-motor interface, the single circuit board assembly includes a first side of a board with logic modules located thereon. The single circuit board assembly also includes a second side of the board with power modules located thereon. The board comprises a plurality of layers, the plurality of layers having at least one through via and at least one buried via defined therein, wherein the at least one through via extends through all of the plurality of layers, the at least one buried via extending through less than all of the plurality of layers.

A connection structure embedded substrate includes a printed circuit board including a first insulating body and a plurality of first wiring layers disposed on at least one of an external region or an internal region of the first insulating body; and a connection structure embedded in the first insulating body and including first and second substrates. The first and second substrates are disposed adjacent to each other.

A PCB, a method of manufacturing the PCB, and a mobile terminal are provided. The PCB includes a PCB body and a PCB element. A first surface of the PCB body is provided with a groove. The PCB element includes a connection terminal, and a part of the PCB element is arranged within the groove. The connection terminal includes a first portion arranged within the groove and a second groove arranged outside the groove, and the first portion is electrically connected to conductive layers in the PCB body.

The present disclosure provides a printed circuit board and a wire arrangement method thereof. The printed circuit board includes a packaged chip and at least two connectors, wires of the packaged chip that are connected to different connectors are distributed on different board layers; and when the packaged chip is connected to one of the connectors, a via is backdrilled to form a high-speed path from the packaged chip to the connector, and copper walls of board layers corresponding to other connectors are drilled out. The wires of the packaged chip that are connected to different connectors are distributed on different board layers. When the packaged chip is connected to one of the connectors, according to backdrilling of different depths, the via is backdrilled to form a high-speed path from the packaged chip to the connector, and copper walls of board layers corresponding to other connectors are drilled out.

In one aspect, a PCB is provided. The PCB includes at least one insulating layer, a blind slot, and at least one via. The at least on insulating layer includes a first surface and a second surface opposite the first surface. The blind slot is plated and formed in the at least one insulating layer, where the blind slot partially extends from the first surface to the second surface, and where the blind slot includes a conductive plating bonded along a major surface of the blind slot. The at least one via is electrically conductive and filled, where the at least one via is coupled with and extends between the conductive plating of the blind slot and the second surface of the at least one insulating layer.

Provided is a display device including: a display panel in which a display area and a non-display area located around the display area are defined; an external device which is disposed on the non-display area of the display panel; and a cover member which is disposed on the external device, wherein the external device includes a driving chip and a printed circuit film which is disposed on the non-display area of the display panel and spaced apart from the display area with the driving chip interposed between the printed circuit film and the display area in plan view, and the cover member includes a first insulating tape disposed on the external device, a first conductive tape disposed on the first insulating tape and a second insulating tape disposed on the first conductive tape, wherein the second insulating tape includes an electrostatic induction opening penetrating the second insulating tape in a thickness direction, a planar size of the first conductive tape is greater than a planar size of the second insulating tape, the first conductive tape protrudes further toward the display area than the second insulating tape in plan view, and the electrostatic induction opening is disposed on a part of the first conductive tape which protrudes further toward the display area than the second insulating tape.

A printed circuit board according to various embodiments of the disclosure includes a plurality of layers in which at least one opening is formed and at least one antenna included in at least one layer among the plurality of layers, and the at least one opening is located within a specified distance from the at least one antenna and is formed through at least one of the plurality of layers.

A package substrate includes an inner interlayer, a first conductor layer, a second conductor layer, an outermost interlayer, an outermost conductor layer including first and second pads to mount electronic components, vias including first and second vias such that the first vias are connecting the first conductor layer and first pads and the second vias are connecting the first conductor layer and second pads, and skip vias penetrating through the outermost and inner interlayers such that the skip vias are connecting the outermost and second conductor layers. Sum of insulation distances (t1, t2) is in range of 40 μm or less to 10 μm or more, where the insulation distance (t1) is insulation distance between the outermost and first conductor layers and the insulation distance (t2) is insulation distance between the first and second conductor layers, and difference between the insulation distances (t1, t2) is less than 5 μm.