A GHeT includes a bottom gate formed on a substrate; a first dielectric layer (DL) formed on the bottom gate; a monolayer film formed of an atomically thin material on the first DL; a bottom contact (BC) formed on part of the monolayer film; a second DL formed on the BC; a top contact (TC) formed on the second DL on top of the BC; a network of CNTs formed on the TC and the monolayer film, to define an overlap region with the monolayer film; a third DL formed on the CNT network, the monolayer film and the TC; and a top gate formed on the third DL and overlapping with the overlap region. Such GHeT design allows gate tunability of Gaussian peak position, height and width that define Gaussian transfer characteristic, thereby enabling simplified circuit architectures for various spiking neuron functions for emerging neuromorphic applications.

A selection transistor and a light-emitting transistor are formed in a pixel. The selection transistor includes a gate electrode connected to a scan line, a first source/drain electrode connected to a signal line, and a second source/drain electrode. The light-emitting transistor includes a gate electrode connected to the second source/drain electrode of the selection transistor, a first electrode connected to a first line, a second electrode connected to a second line, and a channel layer including quantum dots. The light-emitting transistor controls the quantum dots to emit light by a carrier flowing through the channel layer.

A display device includes a base substrate including a display area and a non-display area around the display area are defined, a first interlayer insulating layer disposed on the base substrate, a second interlayer insulating layer disposed on the first interlayer insulating layer, a first semiconductor layer disposed on the second interlayer insulating layer and including an oxide, and a first gate insulating layer disposed on the first semiconductor layer, wherein the material of the first interlayer insulating layer and the material of the second interlayer insulating layer are different from each other. Methods of manufacturing a display device are also disclosed.

An example dual plate Organic Light-Emitting Field-Effect Transistor (OLET) display device includes a first plate device having a first substrate; a gate layer adjacent to the first substrate; and a dielectric layer adjacent to the gate layer. A second plate device is connected to the first plate device. The second plate device includes a second substrate; a source/drain layer adjacent to the second substrate; and a stacked active organic layer adjacent to the source/drain layer. The first plate device and the second plate device are to be independently fabricated and joined together to position the stacked active organic layer adjacent to the dielectric layer.

A display device includes a base substrate including a display area and a non-display area around the display area are defined, a first interlayer insulating layer disposed on the base substrate, a second interlayer insulating layer disposed on the first interlayer insulating layer, a first semiconductor layer disposed on the second interlayer insulating layer and including an oxide, and a first gate insulating layer disposed on the first semiconductor layer, wherein the material of the first interlayer insulating layer and the material of the second interlayer insulating layer are different from each other. Methods of manufacturing a display device are also disclosed.

To suppress a malfunction of a circuit due to deterioration in a transistor. In a transistor which continuously outputs signals having certain levels (e.g., L-level signals) in a pixel or a circuit, the direction of current flowing through the transistor is changed (inverted). That is, by changing the level of voltage applied to a first terminal and a second terminal (terminals serving as a source and a drain) every given period, the source and the drain are switched every given period. Specifically, in a portion which successively outputs signals having certain levels (e.g., L-level signals) in a circuit including a transistor, L-level signals having a plurality of different potentials (L-level signals whose potentials are changed every given period) are used as the signals having certain levels.

An organic light-emitting display device comprises a first thin-film transistor disposed on a substrate; and a second thin-film transistor disposed on the substrate and spaced apart from the first thin-film transistor. The first thin-film transistor comprises a first semiconductor layer, a first conductive layer disposed on the first semiconductor layer and that overlaps the first semiconductor layer, and a first insulating layer disposed between the first semiconductor layer and the first conductive layer. The second thin-film transistor comprises a second semiconductor layer, and a second conductive layer disposed on the second semiconductor layer and that overlaps the second semiconductor layer. The first semiconductor layer is disposed on a layer higher than the second semiconductor layer, the first semiconductor layer comprises an oxide semiconductor, the second semiconductor layer comprises low temperature polycrystalline silicon (LTPS), and the first insulating layer covers the entire first semiconductor layer.

An organic light-emitting diode (OLED) display panel is provided, including an array layer. The array layer includes a first source electrode and a second source electrode that are disposed in contact with each other, and a first drain electrode and a second drain electrode that are disposed in contact with each other. The first source electrode and the first drain electrode are in contact with an active layer through via holes. The first source/drain electrode and the second source/drain electrode are disposed in contact with each other, thereby reducing a probability of abnormal via holes in a source/drain region and facilitating wiring in the source/drain region.

A display device includes a driving transistor and an organic EL element. The driving transistor includes an oxide semiconductor layer; a first gate electrode that includes a region overlapping the oxide semiconductor layer; a first insulating layer between the first gate electrode and the oxide semiconductor layer; a second gate electrode that includes a region overlapping the oxide semiconductor layer and the first gate electrode; a second insulating layer between the second gate electrode and the oxide semiconductor layer; and a first and a second transparent conductive layer that are provided between the oxide semiconductor layer and the first insulating layer and each include a region contacting the oxide semiconductor layer. The organic EL element includes a first electrode; a second electrode; a light emitting layer between the first electrode and the second electrode; and an electron transfer layer between the light emitting layer and the first electrode.

Embodiments relate to a computing device that may be configured as a biomimetic audiomorphic device. The device can include a field effect transistor (FET) having a split-gate architecture with different spacing between the split-gates. Embodiments of the device can include multiple split-gates. Some embodiments include the integration of delay elements and tunable resistor-capacitance (RC) circuits for imitating the interaural time delay neurons. Some embodiments include global back-gating structural features to provide neuroplasticity aspects so as to provide adaptation related changes.